C8051F336-GMR Silicon Laboratories Inc, C8051F336-GMR Datasheet - Page 7

• Manufacturer Part Number: C8051F336-GMR
• Description: Microcontrollers (MCU) 16KB 10ADC 10DAC 768Ram MCU Lead Free
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F336-GMR

• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 768 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-20
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F336DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• On-chip Dac: 10 bit
• Package: 20QFN
• Device Core: 8051
• Family Name: C8051F336
• Maximum Speed: 25 MHz
• Ram Size: 768 Byte
• Operating Temperature: -40 to 85 °C
• Lead Free Status / Rohs Status: Details

List of Figures
1. System Overview
2. Ordering Information
3. Pin Definitions
4. QFN-20 Package Specifications
5. QFN-24 Package Specifications
6. Electrical Characteristics
7. 10-Bit ADC (ADC0, C8051F336/8 only)
8. Temperature Sensor (C8051F336/8 only)
9. 10-Bit Current Mode DAC (IDA0, C8051F336/8 only)
10. Voltage Reference (C8051F336/8 only)
11. Comparator0
12. CIP-51 Microcontroller
13. Memory Organization
14. Special Function Registers
Figure 1.1. C8051F336/7 Block Diagram ................................................................ 16
Figure 1.2. C8051F338/9 Block Diagram ................................................................ 17
Figure 3.1. QFN-20 Pinout Diagram (Top View) ..................................................... 21
Figure 3.2. QFN-24 Pinout Diagram (Top View) ..................................................... 22
Figure 4.1. QFN-20 Package Drawing .................................................................... 23
Figure 4.2. QFN-20 Recommended PCB Land Pattern .......................................... 24
Figure 5.1. QFN-24 Package Drawing .................................................................... 25
Figure 5.2. QFN-24 Recommended PCB Land Pattern .......................................... 26
Figure 6.1. Normal Mode Digital Supply Current vs. Frequency ............................. 36
Figure 6.2. Idle Mode Digital Supply Current vs. Frequency ................................... 36
Figure 7.1. ADC0 Functional Block Diagram ........................................................... 37
Figure 7.2. 10-Bit ADC Track and Conversion Example Timing ............................. 39
Figure 7.3. ADC0 Equivalent Input Circuits ............................................................. 40
Figure 7.4. ADC Window Compare Example: Right-Justified Single-Ended Data .. 46
Figure 7.5. ADC Window Compare Example: Left-Justified Single-Ended Data ..... 46
Figure 7.6. ADC Window Compare Example: Right-Justified Differential Data ....... 47
Figure 7.7. ADC Window Compare Example: Left-Justified Differential Data ......... 47
Figure 7.8. ADC0 Multiplexer Block Diagram .......................................................... 48
Figure 8.1. Temperature Sensor Transfer Function ................................................ 51
Figure 9.1. IDA0 Functional Block Diagram ............................................................ 52
Figure 9.2. IDA0 Data Word Mapping ..................................................................... 53
Figure 10.1. Voltage Reference Functional Block Diagram ..................................... 56
Figure 11.1. Comparator0 Functional Block Diagram ............................................. 58
Figure 11.2. Comparator Hysteresis Plot ................................................................ 59
Figure 11.3. Comparator Input Multiplexer Block Diagram ...................................... 63
Figure 12.1. CIP-51 Block Diagram ......................................................................... 65
Figure 13.1. C8051F336/7/8/9 Memory Map ........................................................... 74
Figure 13.2. Flash Program Memory Map ............................................................... 75
Rev.1.0
C8051F336/7/8/9
7