MPC8314ECVRADDA Freescale Semiconductor, MPC8314ECVRADDA Datasheet - Page 17

• Manufacturer Part Number: MPC8314ECVRADDA
• Description: MPU POWERQUICC II PRO 620-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8314ECVRADDA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 12
Table 13
MPC8314E when GVDD(typ) = 2.5 V
Freescale Semiconductor
Output low current (V
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver.
3. V
4. Output leakage is measured with all outputs disabled, 0 V
Input/output capacitance: DQ, DQS
Delta input/output capacitance: DQ, DQS
Note:
1. This parameter is sampled. GVDD = 1.8 V ± 0.090 V, f = 1 MHz, T
I/O supply voltage
I/O reference voltage
I/O termination voltage
Input high voltage
Input low voltage
Output leakage current
Output high current (V
GVDD = 2.3V)
Output low current (V
Notes:
1. GVDD is expected to be within 50 mV of the DRAM GVDD at all times.
2. MVREF is expected to be equal to 0.5 × GVDD, and to track GVDD DC variations as measured at the receiver.
3. V
4. Output leakage is measured with all outputs disabled, 0 V
Peak-to-peak noise on MVREF may not exceed ±2% of the DC value.
equal to MVREF. This rail should track variations in the DC level of MVREF.
Peak-to-peak noise on MVREF may not exceed ±2% of the DC value.
equal to MVREF. This rail should track variations in the DC level of MVREF.
TT
TT
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
Parameter/Condition
Table 11. DDR2 SDRAM DC Electrical Characteristics for GVDD(typ) = 1.8 V (continued)
provides the DDR2 capacitance when
provides the recommended operating conditions for the DDR SDRAM component(s) of the
Parameter/Condition
Table 13. DDR SDRAM DC Electrical Characteristics for GVDD(typ) = 2.5 V
Parameter/Condition
OUT
OUT
OUT
MPC8314E PowerQUICC
= 0.280 V)
= 0.35 V)
= 1.95 V,
Table 12. DDR2 SDRAM Capacitance for GVDD(typ) = 1.8 V
Symbol
.
I
OL
™
Symbol
MVREF
GVDD
II Pro Processor Hardware Specifications, Rev. 0
V
V
I
V
I
I
OH
OZ
OL
TT
IH
IL
GVDD(typ) =
≤
≤
V
V
Symbol
OUT
OUT
13.4
Min
MVREF – 0.04
MVREF + 0.15
C
0.49 × GVDD
C
DIO
IO
A
≤
≤
–16.2
= 25°C, V
–0.3
–9.9
16.2
GVDD.
GVDD.
Min
2.3
1.8 V.
OUT
Min
—
6
= GVDD/2, V
MVREF + 0.04
MVREF – 0.15
0.51 × GVDD
Max
GVDD + 0.3
—
Max
–9.9
2.7
Max
—
—
0.5
8
OUT
(peak-to-peak) = 0.2 V.
DDR and DDR2 SDRAM
Unit
Unit
mA
pF
pF
Unit
mA
mA
μA
V
V
V
V
V
Notes
Notes
Notes
1
1
—
—
—
—
1
2
3
4
17