MPC8314ECVRADDA Freescale Semiconductor, MPC8314ECVRADDA Datasheet - Page 56

MPU POWERQUICC II PRO 620-PBGA

MPC8314ECVRADDA

Manufacturer Part Number
MPC8314ECVRADDA
Description
MPU POWERQUICC II PRO 620-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8314ECVRADDA

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
266MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
620-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number:
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Manufacturer:
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Quantity:
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High-Speed Serial Interfaces (HSSI)
Many other low voltage differential type outputs like LVDS (Low Voltage Differential Signaling) can be
used but may need to be AC-coupled due to the limited common mode input range allowed (100 to 400
mV) for DC-coupled connection.
LVPECL outputs can produce signal with too large amplitude and may need to be DC-biased at clock
driver output first, then followed with series attenuation resistor to reduce the amplitude, in addition to
AC-coupling.
Figure 42
assumes that the DC levels of the clock driver chip is compatible with MPC8315E SerDes reference clock
input’s DC requirement.
Figure 43
Since LVDS clock driver’s common mode voltage is higher than the MPC8315E SerDes reference clock
input’s allowed range (100 to 400mV), AC-coupled connection scheme must be used. It assumes the
56
HCSL CLK Driver Chip
Total 50 Ω. Assume clock driver’s
output impedance is about 16 Ω.
Clock Driver
Clock Driver
Figure 42. DC-Coupled Differential Connection with HCSL Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for HCSL type clock driver. It
shows the SerDes reference clock connection reference circuits for LVDS type clock driver.
CLK_Out
CLK_Out
CLK_Out
Figure 42
fact that clock driver chip's internal structure, output impedance and
termination requirements are different between various clock driver chip
manufacturers, it’s very possible that the clock circuit reference designs
provided by clock driver chip vendor are different from what is shown
below. They might also vary from one vendor to the other. Therefore,
Freescale Semiconductor can neither provide the optimal clock driver
reference circuits, nor guarantee the correctness of the following clock
driver connection reference circuits. The system designer is recommended
to contact the selected clock driver chip vendor for the optimal reference
circuits with the MPC8315E SerDes reference clock receiver requirement
provided in this document.
MPC8314E PowerQUICC
to
33 Ω
33 Ω
Figure 45
Clock driver vendor dependent
source termination resistor
100 Ω differential PWB trace
below are for conceptual reference only. Due to the
II Pro Processor Hardware Specifications, Rev. 0
NOTE
SD_REF_CLK
SD_REF_CLK
50 Ω
50 Ω
Freescale Semiconductor
MPC8315E
SerDes Refer.
CLK Receiver

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