MPC8314ECVRADDA Freescale Semiconductor, MPC8314ECVRADDA Datasheet - Page 57

• Manufacturer Part Number: MPC8314ECVRADDA
• Description: MPU POWERQUICC II PRO 620-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8314ECVRADDA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

LVDS output driver features 50-Ω termination resistor. It also assumes that the LVDS transmitter
establishes its own common mode level without relying on the receiver or other external component.
Figure 44
Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with
MPC8315E SerDes reference clock input’s DC requirement, AC-coupling has to be used.
assumes that the LVPECL clock driver’s output impedance is 50Ω. R1 is used to DC-bias the LVPECL
outputs prior to AC-coupling. Its value could be ranged from 140Ω to 240Ω depending on clock driver
vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-Ω termination
resistor to attenuate the LVPECL output’s differential peak level such that it meets the MPC8315E SerDes
reference clock’s differential input amplitude requirement (between 200mV and 800mV differential peak).
For example, if the LVPECL output’s differential peak is 900mV and the desired SerDes reference clock
input amplitude is selected as 600mV, the attenuation factor is 0.67, which requires R2 = 25Ω. Please
consult clock driver chip manufacturer to verify whether this connection scheme is compatible with a
particular clock driver chip.
Freescale Semiconductor
LVDS CLK Driver Chip
Clock Driver
Clock Driver
Figure 43. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
CLK_Out
CLK_Out
MPC8314E PowerQUICC
10 nF
10 nF
100 Ω differential PWB trace
™
II Pro Processor Hardware Specifications, Rev. 0
SD_REF_CLK
SD_REF_CLK
50 Ω
High-Speed Serial Interfaces (HSSI)
50 Ω
MPC8315E
SerDes Refer.
CLK Receiver
Figure 44
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