MC68LC060RC50 Freescale Semiconductor, MC68LC060RC50 Datasheet - Page 224

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MC68LC060RC50

Manufacturer Part Number
MC68LC060RC50
Description
IC MPU 32BIT 68K 50MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68LC060RC50

Processor Type
M680x0 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
In addition, the snoop address on A31–A0 is again registered on the next CLK (not BCLK)
rising edge. For proper operation, the snoop addresses registered on these two separate
occasions must be consistent. Only normal and MOVE16 bus transfers can be snooped.
The MC68060 then examines the address of the transfer and invalidates the line in its
caches in which the address matches. This process is done quietly without external indica-
tion that a cache entry has been invalidated. Note that when snooping is enabled and an
entry matches in the MC68060 caches, the entry is invalidated regardless of the state of the
R/W signal, transfer size, or whether or not the line has clean or dirty data. If SNOOP is
negated, no snooping is done, and no lines in the caches are invalidated.
MOTOROLA
* AM indicates the alternate bus master.
ARBITRATION
ATTRIBUTES
TRANSFER
D31–D0
A31–A0
AM_BG*
AM_BR*
STATE
BCLK
BUS
BTT
BR
BG
TA
BB
TS
Figure 7-45. Implicit Bus Ownership Arbitration Timing
AM-EX
C1
ALTERNATE
MASTER
AM-EX
C2
M68060 USER’S MANUAL
AM-EX
C3
IM-OWN
C4
IMPLICITLY
OWNED
BUS
IM-OWN
C5
EX-OWN
C6
BUS OWNED
AND ACTIVE
PROCESSOR
EX-OWN
C7
EX-OWN
C8
BUS OWNED
AND IDLE
EX-OWN
C9
Bus Operation
7-69

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