MC68LC060RC50 Freescale Semiconductor, MC68LC060RC50 Datasheet - Page 381

• Manufacturer Part Number: MC68LC060RC50
• Description: IC MPU 32BIT 68K 50MHZ 206-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68LC060RC50

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 206-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

MC68060 Software Package
C.3.2.4 EXCEPTIONS DURING EMULATION. Unimplemented data type, unimplemented
effective address, and unimplemented floating-point instruction exception software emula-
tion by the M68060FPSP may determine that the instruction being emulated should take a
BSUN, SNAN, OPERR, OVFL, UNFL, DZ, or INEX exception. These exceptions may either
be enabled or disabled (see examples in Figure C-9).
C.3.2.4.1 Trap-Disabled Operation. If a newly found exception is disabled by the user,
then the default result for that exception is returned as the result of emulation by the
M68060FPSP. The handler then returns the processor to normal processing.
C-20
(1) "fsin" software emulation determines that the sine operation should cause an underflow.
(2) If UNFL is:
(1) fp0 contains a denormalized number and fp1 contains an SNAN; the exceptionis taken as a pre-
(2) "fdiv" software emulation determines that the divide should cause a signalling non exception.
(2) If SNAN is:
• DISABLED: the default result is calculated and returned at point "a"; the "exception present"
• ENABLED: an fsave frame with the underflow exception set is restored into the FPU at point "a"
instruction exception at point "a".
• DISABLED: The default result is calculated and returned at point "a"; the exception present"
• ENABLED: an fsave frame with the SNAN exception set is restored into the FPU at point "a" with
bit in the FPU is clear.
with the "exception present" bit set.
The actual underflow will occur as a pre-instruction exception at point "b".
bit in the FPU is clear.
the "exception present" bit set. The actual SNAN exception will then occur immediately as a pre-
instruction exception when the unimplemented floating point data type handler
fsin.x
<non-fp>
<non-fp>
<non-fp>
<fp instruction>
fdiv.x
<non-fp>
<non-fp>
<non-fp>
<fp instruction>
Figure C-9. Disabled vs. Enabled Exception Actions
fp0
fp0, fp1
M68060 USER’S MANUAL
(a)
(b)
TAKES FLOATING-POINT UNIMPLEMENTED
EXCEPTION IMMEDIATELY
(a)
(b)
TAKES FLOATING-POINT UNIMPLEMENTED
DATA TYPE EXCEPTION HERE
(a)
MOTOROLA