MC68LC060RC50 Freescale Semiconductor, MC68LC060RC50 Datasheet - Page 87

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MC68LC060RC50

Manufacturer Part Number
MC68LC060RC50
Description
IC MPU 32BIT 68K 50MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68LC060RC50

Processor Type
M680x0 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Management Unit
table for each demand, then the process of making such demands builds the translation
table.
For example, consider an operating system that is preparing the system to execute a previ-
ously unexecuted task that has no translation table. Rather than guessing what the memory-
usage requirements of the task are, the operating system creates a translation table for the
task that maps one page corresponding to the initial value of the program counter (PC) for
that task and one page corresponding to the initial stack pointer of the task, leaving the other
branches with invalid descriptors. All other branches of the translation table for this task
remain unallocated until the task requests access to the areas mapped by these branches.
This technique allows the operating system to construct a minimal translation table for each
task, conserving physical memory utilization and minimizing operating system overhead.
4-18
TASK A
TASK B
ADDRESS OFFSET =
* PAGE FRAME ADDRESS SHARED BY TASK A AND B; WRITE PROTECTED FROM TASK A.
TABLE ENTRY # =
$76543210 =
ROOT POINTER
ROOT POINTER
Figure 4-14. Translation Table Using Shared Tables
0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 0 0 0 1 X X X X X X X X X X X X X
ROOT INDEX
$EC
$3B
$3B
M68060 USER’S MANUAL
W-BIT CLEAR
ROOT-LEVEL
POINTER INDEX
TABLE $00
W-BIT SET
TABLES
$15
$54
LOGICAL ADDRESS
PAGE INDEX
$15
$01
$04
POINTER-LEVEL
TABLE $3B
TABLE $00
$00003000
TABLES
PAGE OFFSET
$01
FRAME ADDRESS*
PAGE-LEVEL
TABLE $15
TABLE $00
TABLES
MOTOROLA

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