MC68LC060RC50 Freescale Semiconductor, MC68LC060RC50 Datasheet - Page 288

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MC68LC060RC50

Manufacturer Part Number
MC68LC060RC50
Description
IC MPU 32BIT 68K 50MHZ 206-PGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68LC060RC50

Processor Type
M680x0 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
206-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
9.2.2 Debug Pipe Control Mode Commands
The following capabilities are provided by the debug pipe control mode:
Table 9-5 provides a brief summary of the command functions that are made available
through the debug pipe control mode. Most of the commands can only be issued only when
the processor is halted.
MOTOROLA
• Halt and restart processor execution
• Forcing the processor into an emulator mode
• From a halted processor state, the following additional capabilities are provided:
—Setting and resetting a non-pipelined execution mode in the processor
—Override disable processor configuration features (instruction cache, data cache,
—Forcing insertion of cache and ATC control operations into the processor pipeline for
—Forcing all processor outputs into and out of a high-impedance state and disable all
—Setting and resetting modes that convert trace exceptions and breakpoint instruc-
address translation caches (ATCs), write buffer, branch cache, floating-point unit
(FPU), superscalar dispatch)
execution (CINV all for instruction cache and data cache, CPUSH all for instruction
cache and data cache, and PFLUSH all for ATCs)
inputs
tions into emulator mode entry
M68060 USER’S MANUAL
IEEE 1149.1 Test (JTAG) and Debug Pipe Control Modes
9-27

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