TMP86C993XB(EYZ) Toshiba, TMP86C993XB(EYZ) Datasheet - Page 169

• Manufacturer Part Number: TMP86C993XB(EYZ)
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba
• Series: -r

Specifications of TMP86C993XB(EYZ)

• Accessory Type: Adapter
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TMP86F SSOP
• Other names: TMP86C993XB; TMP86C993XB

15.5.8
SDA pin
SCL pin
PIN, and “0” to the BB. Do not modify the contents of MST, TRX, BB and PIN until a stop condition is generated
on a bus.
a stop condition is generated after releasing the SCL line.
when a start condition on a bus is detected (Bus Busy State) and is cleared to “0” when a stop condition is detected
(Bus Free State).
the ACK is complete, a serial bus interface interrupt request (INTSBI) is generated.
time that the PIN is “0”, the SCL pin is pulled-down to low level.
the software.
When the BB is “1”, sequence of generating a stop condition is started by writing “1” to the MST, TRX and
When a stop condition is generated and the SCL line on a bus is pulled-down to low level by another device,
The bus condition can be indicated by reading the contents of the BB (Bit5 in SBISRB). The BB is set to “1”
When a serial bus interface circuit is in the master mode and transferring a number of clocks set by the BC and
In the slave mode, the conditions of generating INTSBI interrupt request are follows:
When a serial bus interface interrupt request occurs, the PIN (Bit4 in SBISRB) is cleared to “0”. During the
Either writing data to SBIDBR or reading data from the SBIDBR sets the PIN to “1”.
The time from the PIN being set to “1” until the SCL pin is released takes t
Although the PIN (Bit4 in SBICRB) can be set to “1” by the software, the PIN can not be cleared to “0” by
Figure 15-5 Start Condition Generation and Slave Address Generation
Interrupt service request and cancel
Note:When the arbitration lost occurs, if the slave address sent from the other master devices is not match,
・ At the end of acknowledge signal when the received slave address matches to the value set by the
・ At the end of acknowledge signal when a “GENERAL CALL” is received
・ At the end of transferring or receiving after matching of slave address or receiving of “GENERAL
I2CAR
CALL”
the INTSBI interrupt request is generated. But the PIN is not cleared.
Start condition
Figure 15-6 Stop Condition Generation
SCL pin
SDA pin
A6
1
A5
2
A4
Slave address and the direction bit
3
Page 155
A3
4
Stop condition
A2
5
A1
6
A0
7
LOW
.
R/W
8
TMP86FH92DMG
Acknowledge signal
9