TMP86C993XB(EYZ) Toshiba, TMP86C993XB(EYZ) Datasheet - Page 21

• Manufacturer Part Number: TMP86C993XB(EYZ)
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba
• Series: -r

Specifications of TMP86C993XB(EYZ)

• Accessory Type: Adapter
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TMP86F SSOP
• Other names: TMP86C993XB; TMP86C993XB

2. Operational Description
2.1
2.1.1
2.1.2
2.1.3
CPU Core Functions
The CPU core consists of a CPU, a system clock controller, and an interrupt controller.
This section provides a description of the CPU core, the program memory, the data memory, and the reset circuit.
tion register). They are all mapped in 64-Kbyte address space. Figure 2-1 shows the TMP86FH92DMG memory
address map.
to 00FFH) of the internal RAM are located in the direct area; instructions with shorten operations are available
against such an area.
Memory Address Map
Program Memory (Flash)
Data Memory (RAM)
The TMP86FH92DMG memory is composed Flash, RAM, DBR(Data buffer register) and SFR(Special func-
The TMP86FH92DMG has a 16384 bytes (Address C000H to FFFFH) of program memory (Flash).
The TMP86FH92DMG has 512bytes (Address 0040H to 023FH) of internal RAM. The first 192 bytes (0040H
Flash
RAM
DBR
SFR
FFDF
FFBF
FFC0
0FFF
C000
FFB0
FFE0
FFFF
0000
003F
0040
023F
0F80
H
H
H
H
H
H
H
H
H
H
H
H
H
Figure 2-1 Memory Address Map
64 bytes
16384
bytes
bytes
bytes
512
128
Page 7
Vector table for interrupts
(16 bytes)
Vector table for vector call instructions
(32 bytes)
Vector table for interrupts
(32 bytes)
Flash: Program memory
RAM:
DBR: Data buffer register includes:
SFR:
Special function register includes:
I/O ports
Peripheral control registers
Peripheral status registers
System control registers
Program status word
Random access memory includes:
Data memory
Stack
Peripheral control registers
Peripheral status registers
TMP86FH92DMG