TMP86C993XB(EYZ) Toshiba, TMP86C993XB(EYZ) Datasheet - Page 87

• Manufacturer Part Number: TMP86C993XB(EYZ)
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba
• Series: -r

Specifications of TMP86C993XB(EYZ)

• Accessory Type: Adapter
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TMP86F SSOP
• Other names: TMP86C993XB; TMP86C993XB

8.2.5
Clock
Binary counter
Overflow
INTWDT interrupt request
(WDTCR1<WDTOUT>= "0")
Internal reset
(WDTCR1<WDTOUT>= "1")
request is generated. When a watchdog timer reset request is generated, the internal hardware is reset. The reset
time is maximum 24/fc [s] (1.5 μs @ fc = 16.0 MHz).
Watchdog Timer Reset
When a binary-counter overflow occurs while WDTCR1<WDTOUT> is set to “1”, a watchdog timer reset
Note:When a watchdog timer reset is generated in the SLOW1 mode, the reset time is maximum 24/fc (high-
frequency clock) since the high-frequency clock oscillator is restarted. However, when crystals have
inaccuracies upon start of the high-frequency clock oscillator, the reset time should be considered as an
approximate value because it has slight errors.
1
Figure 8-2 Watchdog Timer Interrupt
Write 4E
2
H
to WDTCR2
3
2
17
/fc
0
Page 73
1
2
19
/fc [s]
2
3
A reset occurs
TMP86FH92DMG
0
(WDTT=11)