TMP86C993XB(EYZ) Toshiba, TMP86C993XB(EYZ) Datasheet - Page 25

• Manufacturer Part Number: TMP86C993XB(EYZ)
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba
• Series: -r

Specifications of TMP86C993XB(EYZ)

• Accessory Type: Adapter
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TMP86F SSOP
• Other names: TMP86C993XB; TMP86C993XB

Timing Generator Control Register
2.2.3
(0036H)
TBTCR
Main system clock
2.2.2.2
2.2.3.1
Note 1: In single clock mode, do not set DV7CK to “1”.
Note 2: Do not set “1” on DV7CK while the low-frequency clock is not operated stably.
Note 3: fc: High-frequency clock [Hz], fs: Low-frequency clock [Hz], *: Don’t care
Note 4: In SLOW1/2 and SLEEP1/2 modes, the DV7CK setting is ineffective, and fs is input to the 7th stage of the divider.
Note 5: When STOP mode is entered from NORMAL1/2 mode, the DV7CK setting is ineffective during the warm-up period after
frequency clocks, and switches the main system clock. There are three operating modes: Single clock mode, dual
clock mode and STOP mode. These modes are controlled by the system control registers (SYSCR1 and SYSCR2).
Figure 2-6 shows the operating mode transition diagram.
Operation Mode Control Circuit
The operation mode control circuit starts and stops the oscillation circuits for the high-frequency and low-
(DVOEN)
of instructions for the TLCS-870/C Series: Ranging from 1-cycle instructions which require one machine
cycle for execution to 10-cycle instructions which require 10 machine cycles for execution. A machine cycle
consists of 4 states (S0 to S3), and each state consists of one main system clock.
are used as input/output ports. The main-system clock is obtained from the high-frequency clock. In the single-
clock mode, the machine cycle time is 4/fc [s].
DV7CK
State
release of STOP mode, and the 6th stage of the divider is input to the 7th stage during this period.
(1)
Instruction execution and peripheral hardware operation are synchronized with the main system clock.
The minimum instruction execution unit is called an “machine cycle”. There are a total of 10 different types
Only The oscillation circuit for the high-frequency clock is used, and P21 (XTIN) and P22 (XTOUT) pins
Machine cycle
Single-clock mode
7
TMP86FH92DMG is placed in this mode after reset.
In this mode, both the CPU core and on-chip peripherals operate using the high-frequency clock. The
NORMAL1 mode
1/fc or 1/fs [s]
Selection of input to the 7th stage of
the divider
6
(DVOCK)
S0
5
S1
Machine cycle
DV7CK
Figure 2-5 Machine Cycle
4
(TBTEN)
S2
3
0: fc/2
1: fs
Page 11
8
[Hz]
S3
2
(TBTCK)
1
S0
0
S1
(Initial value: 0000 0000)
S2
TMP86FH92DMG
S3
R/W