TMP86C993XB(EYZ) Toshiba, TMP86C993XB(EYZ) Datasheet - Page 7

• Manufacturer Part Number: TMP86C993XB(EYZ)
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba
• Series: -r

Specifications of TMP86C993XB(EYZ)

• Accessory Type: Adapter
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: TMP86F SSOP
• Other names: TMP86C993XB; TMP86C993XB

2. Operational Description
3. Interrupt Control Circuit
Precaution for Using the Emulation Chip / Difference among Products
TMP86FH92DMG
1.1 Features......................................................................................................................................1
1.2 Pin Assignment..........................................................................................................................3
1.3 Block Diagram...........................................................................................................................4
1.4 Pin Names and Functions..........................................................................................................5
2.1 CPU Core Functions .................................................................................................................7
2.2 System Clock Controller ...........................................................................................................8
2.3 Reset Circuit ...........................................................................................................................30
2.4 Internal Reset Detection Flags.................................................................................................33
3.1 Interrupt latches (IL21 to IL2) ................................................................................................36
3.2 Interrupt enable register (EIR) ................................................................................................36
3.3
2.1.1
2.1.2
2.1.3
2.2.1
2.2.2
2.2.3
2.2.4
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
3.2.1
3.2.2
3.3.1
2.2.2.1
2.2.2.2
2.2.3.1
2.2.3.2
2.2.3.3
2.2.3.4
2.2.4.1
2.2.4.2
2.2.4.3
2.2.4.4
Interrupt Sequence .................................................................................................................38
Memory Address Map ........................................................................................................................................................7
Program Memory (Flash) ....................................................................................................................................................7
Data Memory (RAM) .........................................................................................................................................................7
Clock Generator ..................................................................................................................................................................8
Timing Generator ................................................................................................................................................................9
Operation Mode Control Circuit .......................................................................................................................................11
Operating Mode Control ...................................................................................................................................................16
External Reset Input ..........................................................................................................................................................30
Address trap reset ..............................................................................................................................................................31
Watchdog timer reset ........................................................................................................................................................31
System clock reset ............................................................................................................................................................31
Power-on Reset..................................................................................................................................................................32
Voltage detection reset.......................................................................................................................................................32
Trimming data reset...........................................................................................................................................................32
Interrupt master enable flag (IMF) ...................................................................................................................................36
Individual interrupt enable flags (EF21 to EF4) ...............................................................................................................37
Interrupt acceptance processing is packaged as follows. ..................................................................................................38
Configuration of timing generator
Machine cycle
Single-clock mode
Dual-clock mode
STOP mode
Operating Mode Transition
STOP mode
IDLE1/2 mode and SLEEP1/2 mode
IDLE0 and SLEEP0 modes (IDLE0, SLEEP0)
SLOW mode
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