RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 132

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
4.4.2.3
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The transmit current AU pointer value is accessible via register T_CAU_PT. Note that this value
may be different from the programmed (register T_AU_PTS) value, if some pointer movement has
been generated via the microprocessor (see
4.4.2.2.2 Testing Features: Transmit AU Pointer Operations
For testing purposes, positive or negative pointer movements, as well as NDF indication (NDF
transmit bits are set to '1001'), may be generated via the microprocessor (see AU pointer
operational configuration register T_AU_PTS). The Intel IXF6048 only allows the generation of
consecutive pointer movements separated by at least 4 frames.
In the case of a concatenated payload, it is possible to invert the concatenation indication value in
the unused H1 bytes via configuration register T_HPT_OPC.
4.4.2.2.3 AU-AIS Insertion
It is possible to force AU-AIS (all '1's into AU) via register T_HPT_OPC.
Multiplexer Section Transmitter
The multiplexer section inserts the MSOH overhead bytes into the transmit frame.
Note that in the case of a regenerator, all the received MSOH bytes are passed through unchanged.
4.4.2.3.1 B2 Byte(s) Interleaved Parity
The B2 bytes (BIP-8 in OC-1 mode, BIP-24 in OC-3 mode, BIP-96 in OC-12 mode, and BIP-384
in OC-48 mode) are provided by one of three sources configured in register T_SC_MSOH,
combined with input serial bus control pin TSOHINS:
4.4.2.3.2 K1 and K2 Automatic Protection Channel Bytes and MS-RDI
These bytes are assigned for APS signaling and the transmission of a Multiplex Section Remote
Defect Indication.
The K1 source is specified by register T_SC_MSOH, combined with input serial bus control pin
TSOHINS, as coming from:
— The serial TSOH interface (TSOH input pin).
— The incoming byte from the downstream data—when all internally Processed MSOH
— The BIP-8/24/96/384 internal calculation on the previous concatenated payload (default
— The serial TSOH interface (TSOH input pin).
— The serial Transmit Section Alarm port (TSAL input pin).
— The incoming byte from the downstream data—when all internally Processed MSOH
(B2, K1, K2, S1 and M1) bytes are configured in pass-through mode).
setting). For testing purposes, it is possible to invert the B2 value via software
configuration (see register T_RMST_OP). The B2 value can be inverted for a single
frame (8/24/96/384 errors) or for an indefinite duration.
(B2, K1, K2, S1, and M1) bytes are configured in pass-through mode.
Section
4.4.2.2.2).
Datasheet