RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 168

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RCLXT16706FE

Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet

Specifications of RCLXT16706FE

Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
168
Table 20. UTOPIA Receive Data Bus Width
The transmit data bus width is configured by setting XmtUMode[1:0] in global register T_UICNF.
Inputs TXDATA[31:0] are always part of the UTOPIA interface, whereas, TXDATA[63:32] use
inputs from the TTL line side interface or from overhead ports (see the pinout description).
RcvUMode[1:0]
'00'
'01'
'10'
'11'
Data Bus Width
16-bit
32-bit
64-bit
8-bit
Single Mode:
RXDATA[7:0] data bus.
RXDATA [31:8] tristated.
RXDATA[63:32] are not used in the UTOPIA interface.
Quad Mode:
RXDATA[7:0] ch 0 data.
RXDATA[15:8] ch 1 data.
RXDATA[23:16] ch 2 data.
RXDATA[31:24] ch 3 data.
RXDATA[63:32] are not used in the UTOPIA interface.
Single Mode:
RXDATA[15:0] data bus.
RXDATA[31:16] tristated.
RXDATA[63:32] are not used in the UTOPIA interface.
Quad Mode:
RXDATA[15:0] ch 0 data.
RXDATA[31:16] ch 1 data.
RXDATA[47:32] ch 2 data.
RXDATA[63:48] ch 3 data.
RXDATA[31:0] data bus.
RXDATA[63:32] are not used in the UTOPIA interface.
RXDATA[63:0] data bus.
Line Status
Datasheet

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