RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 311

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

11.12.2
11.12.3
Datasheet
31:24
15:8
23:0
Bit
7:4
3:1
Bit
Bit
2
1
0
0
XmtHErrEn
XmtHECAdd
XmtScrEn
XmtPyldPatt[7:0]
XmtGFCPatt[3:0]
XmtPTIPatt[2:0]
XmtCLPPatt
Unused
XmtACellCnt[23:0]
T_ICELLP—Transmit Idle Cell Pattern ((1cc)11H)
This register contains the value of the ATM cell header fields GFC, PTI and CLP and the payload
pattern used in the generated Idle cells. An Idle cell is generated and transmitted when the TACP
block detects that the transmit FIFO does not contain any complete ATM cell.
The VPI and VCI fields of the generated Idle cells contain the all '0's pattern.
T_ACELLCNT—Transmit ATM Cell Counter ((1cc)13H-(1cc)12H)
(1cc)13H = Bits[23:16], (1cc)12H = Bits[15:0]
Name
Name
Name
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
XmtHErrEn controls the insertion of HEC errors into the transmitted
ATM cells according to the configuration stored in XmtHErrCnf.
Errors are inserted when XmtHErrEn is set to logic one.
XmtHECAdd enables the addition (XOR) of the pattern '01010101'
(X
the ATM cell into the SPE:
'0' = The calculated HEC sequence is not modified before
transmission.
'1' = The calculated HEC sequence is modified (by adding the
sequence '01010101') before transmission.
XmtScrEn controls the scrambling of the cell payload by using the
self-synchronous scrambler 1 + X
'0' = The scrambler is disabled.
'1' = The scrambler is enabled.
XmtPyldPatt[7:0] contains the pattern transmitted in the entire 48-
byte payload of the idle cells.
XmtGFCPatt[3:0] contains the Generic Flow Control (GFC) field
transmitted on the first octet of the idle/unassigned cells (bits 1, 2, 3
and 4).
XmtPTIPattPTI[2:0] contains the Payload Type Indicator (PTI) field
transmitted on the fourth octet of the idle/unassigned cells (bits 5, 6
and 7).
XmtCLPPatt contains the Cell Loss Priority (CLP) field transmitted
on the fourth octet of the idle/unassigned cells (bit 8).
6
+ X
XmtACellCnt[23:0] counts the number of ATM cells read
from the transmit FIFO (ATM Layer cells) and mapped into
the transmitted SONET/SDH frames during the last
accumulation interval.
A write to the counter (address (1cc)13H) causes the entire
counter to be loaded into a buffer and then cleared. The
contents of the buffer can then be read.
4
+ X
2
+ 1) to the calculated HEC sequence before mapping
Description
Description
Description
43
:
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Default
Default
Default
00H
6AH
'0'
'1'
'1'
'0'
'0'
'1'
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