RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 342

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
342
RXCLK_i frequency (i = 0, 1, 2, 3)
RXCLK_i duty cycle (i = 0, 1, 2, 3)
RXENB_i setup time to RXCLK_i (i = 0, 1, 2, 3)
RXENB_i hold time from RXCLK_i (i = 0, 1, 2, 3)
RXCLK_i rising edge to RXDATA_i[7:0], RXPRTY_i, RXSOF_i,
RXEOF_i, RXPADL_i, RXVAL_i, RXERR_i, and RXFA_i (i = 0, 1, 2, 3)
propagation delay
RXCLK_i rising edge to RXDATA_i[15:0] (i = 0, 1, 2, 3)
RXCLK_i rising edge to low-impedance RXDATA_i[15:0], RXPRTY_i,
RXSOF_i, RXEOF_i, RXPADL_i, RXVAL_i, RXERR_i, and RXFA_i (i =
0, 1, 2, 3)
RXCLK_i rising edge to high-impedance RXDATA_i[15:0], RXPRTY_i,
RXSOF_i, RXEOF_i, RXPADL_i, RXVAL_i, RXERR_i, and RXFA_i (i =
0, 1, 2, 3)
RXCLK_i rising edge to high-impedance RXDATA_i[15:0] (i = 0, 1, 2,
3)
NOTES:
TXPRTY_i, TXERR_i,
1. In memory mapped mode (RcvSelMode = 1 in register R_UICNF), t
2. In quad 16-bit mode, t
TXPADL_i, TXENB_i,
TXSOF_i, TXEOF_i,
2
Figure 94. Transmit UTOPIA Quad Interface Configured for 50 MHz Operation: 16/8-Bit Data
Table 50. Receive UTOPIA Quad Interface Configured for 50 MHz Operation: 16/8-Bit Data
TXDATA_i[15:0],
TXCLK_i
TXFA_i
Bus and One/Two Clock Cycle Decode-Response Delay
Bus and One/Two Clock Cycle Decode-Response Delay
ul2Rxpd
Parameter
is different than in quad 8-bit mode
VALID OUTPUT
t
ul2Txsu
VALID INPUT
t
ul2Txpd
t
ul2Txh
2
1/f
VALID OUTPUT
ul2Tx
VALID INPUT
ul2Rxsu
Symbol
t
t
t
t
t
t
t
ul2RxhlZ
ul2RxlhZ
ul2RxlhZ
ul2TxlhZ
D
t
ul2Rxsu
ul2Rxpd
ul2Rxpd
f
ul2Rxh
ul2Rx
= 5 ns, otherwise t
ul2Rx
4/5
Min
30
1
1
1
1
1
ul2Rxsu
VALID INPUT
Typ
= 4 ns
t
ul2TxhlZ
Max
50
70
14
14
11
6
VALID OUTPUT
Datasheet
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
%