RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 232
RCLXT16706FE
Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet
1.RCLXT16706FE.pdf
(352 pages)
Specifications of RCLXT16706FE
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
232
Bit
7:5
4:2
1:0
XmtCOCnf[2:0]
XmtIFMode[2:0]
XmtChMode[1:0]
Name
XmtCOCnf[2:0] configures the TTL transmit output clocks (TPCO,
TPCO_i, and TSCO_i) as divided or flowed-through versions of
the transmit source clock. Note that the transmit source clock
depends on the configuration of XmtTimRef[1;0].
2:0
'000' Transmit source clock” ÷ 1 (flow-through)
'001' Transmit input clock ÷ 2
'010' Transmit input clock ÷ 4
'011' Transmit input clock ÷ 8
'100' Transmit input clock ÷ 16
'101' Transmit input clock ÷ 32
'110' 8-KHz clock
'111'
See the pin description for details.
XmtIFMode[2:0] configures the type of line side interface used by
the transmit channel:
'000' = 32-bit TTL
'001' = Reserved
'010' = 8-bit TTL
'011' = 1-bit TTL
'100' = 16-bit PECL
'101' = Reserved
'110' = Reserved
'111' = 1-bit PECL
NOTE: In order to use the line loop back mode (LineLoopBack =
NOTE: The 32-bit TTL and 16-bit PECL configurations can be
XmtChMode[1:0] configures the transmit channel in one of the
following operational modes:
'00' = Test mode. The transmit channel maps a PRBS sequence
(generated using the polynomial X
SPE. Error detection is indicated using register PRBSINT. In this
configuration, no data is read from the UTOPIA transmit FIFO.
'01' = Transparent mode. The transmit channel does not process
the bytes read from the UTOPIA transmit FIFO. The bytes read
from the FIFO are directly copied into the outgoing SPE (allowing
the use of an external SPE generator).
'10' = ATM Mode (UTOPIA)
'11' = POS Mode (UTOPIA like)
TTL Transmit Output Clock
tristated
'1', register COCNF) or to clock the transmit channel by
using the receive channel timing reference
(XmtTimRef[1:0] = '01'), the configuration values
XmtIFMode[2:0] and RcvIFMode[2:0] must match.
used when Intel IXF6048 is configured as a single
transceiver. In this mode (single transceiver
configuration), the configuration values for channels 1, 2
and 3 are ignored.
Description
15
+ X
14
+ 1) into the outgoing
Type
R/W
R/W
R/W
Datasheet
Default
'100'
'111'
'10'
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