RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 64

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
64
Table 4.
Pin Description (Sheet 50 of 66)
RXDATA_0[0]
RXDATA_0[1]
RXDATA_0[2]
RXDATA_0[3]
RXDATA_0[4]
RXDATA_0[5]
RXDATA_0[6]
RXDATA_0[7]
RXDATA_0[8]
RXDATA_0[9]
RXDATA_0[10]
RXDATA_0[11]
RXDATA_0[12]
RXDATA_0[13]
RXDATA_0[14]
RXDATA_0[15]
RXDATA_1[0]
RXDATA_1[1]
RXDATA_1[2]
RXDATA_1[3]
RXDATA_1[4]
RXDATA_1[5]
RXDATA_1[6]
RXDATA_1[7]
RXDATA_1[8]
RXDATA_1[9]
RXDATA_1[10]
RXDATA_1[11]
RXDATA_1[12]
RXDATA_1[13]
RXDATA_1[14]
RXDATA_1[15]
NOTE: See notes 1, 2, and
Pin Name
Receive Quad 16-Bit Mode ATM/POS-UTOPIA Interface (Level 3 and Level 1 Modes)
D13
B13
A12
A14
A13
D14
F14
B14
D16
B18
B17
D17
A18
A19
F16
A20
F20
B23
B24
C22
E21
D21
C23
D22
A27
C25
B26
E23
C26
D25
B27
F23
Pin
LVTTL
Output
12 mA
Type
3
at the end of the table.
Receive UTOPIA data bus.
RXDATA_i[15:0] (i = 0, 1, 2, 3) carries the frame (cell or packet) word
that is read from the receive FIFO #i. The most significant (first received)
byte is transported in RXDATA_i[15:8].
RXDATA_i[15:0] (i = 0, 1, 2, 3) is always driven.
NOTE: Depending on the configuration of RcvDRCnf (register
RXDATA_i[15:0] are updated on the rising edge of RXCLK_i (i = 0, 1, 2,
3).
R_UICNF), a data transfer on RXDATA_i[15:0] happens one
(UTOPIA Level 1) or two (UTOPIA Level 3) clock cycles after
the assertion of RXENB_i (i = 0, 1, 2, 3).
Description
Datasheet