CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 145

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
28236-DSH-001-B
of Status Queue Entries
5.6.1.4 Host Detection
The host can use either a polling operation or an interrupt routine to detect new
status queue entries.
current READ position until it returns a logic high. The host then processes the
status entry, writes the VLD bit to a logic low, and increments its current READ
pointer. Periodically, the host writes the current READ index value into the
READ_UD field of the status queue base table entry.
reassembly coprocessor writes a status queue entry into host memory, the
HOST_ISTAT0 (RSM_HS_WRITE) bit is set to a logic high to prompt an
interrupt. Upon receiving an interrupt, the host reads HOST_ST_WR
(RSM_HS_WRITE[15:0]) to determine which host memory status queue(s)
caused the interrupt.
NOTE:
upon receiving an interrupt, and periodically read HOST_ISTAT0 to ensure that
no error conditions have occurred. Once the interrupt manager has determined
which status queue(s) caused the interrupt, the host starts reading the appropriate
status queues at their current read location. The host processes status entries until
reading an entry with the VLD bit set to logic low. Again, the host periodically
writes the current READ index value into the READ_UD field of the status
queue base table entry.
To poll each status queue, the host continuously reads the VLD bit at the
The host can also use an interrupt routine to process status queues. When the
A typical operation for the interrupt manager is to only read HOST_ISTAT1
Only status queues 0 through 15 are reported in this register.
Mindspeed Technologies
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5.0 Reassembly Coprocessor
5.6 Status Queue Operation
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