CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 355

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

Table 14-11. PCI Configuration Register
CN8236
ATM ServiceSAR Plus with xBR Traffic Management
14.7 PCI Bus Interface Registers
In accordance with the PCI Bus Specification, Revision 2.1, the SAR PCI bus interface implements a 128-byte
configuration register space. These configuration registers are used by the host processor to initialize, control,
and monitor the PCI bus interface logic. The complete definitions of these registers and the relevant fields
within them are given in the PCI bus specification, and are not repeated here. The implementation of the
configuration space registers in the CN8236 is shown in
fields and other registers within the PCI configuration space.
The PCI Special Status register is detailed in
28236-DSH-001-B
0x14–
0x58–
Addr
0x2C
0x3C
0x4C
0x7C
Byte
0x00
0x04
0x08
0x0c
0x10
0x28
0x30
0x34
0x38
0x40
0x44
0x48
0x50
0x54
Table 14-13
31
MAX_LATENCY (0x05)
30
details the PCI Command register and
29
PM_DATA
Reserved
28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
SUBSYSTEM_ID (SID)
DEVICE_ID (0x8236)
PM_CAPABILITY
STATUS
CLASS_CODE (0x020300)
HEADER_TYPE (0x00)
Mindspeed Technologies
MIN_GRANT (0x02)
PCI Configuration Register Layout
Reserved
Reserved
Table
BASE_ADDRESS_REGISTER_0
SPECIAL_STATUS_REGISTER
MASTER_WRITE_ADDR
MASTER_READ_ADDR
EEPROM_REGISTER
14-15.
(0x00000000)
Table 14-14
Reserved
Reserved
Reserved
Reserved
Table
Table 14-16
14-11.
INTERRUPT_PIN (0x01)
shows the PCI Status register breakdown.
NEXT_CAP_PTR
Table 14-12
LAT_TIMER
™
details the EPROM register.
SUBSYSTEM_VENDOR_ID (SVID)
VENDOR_ID (0x14F1)
COMMAND
provides descriptions of
14.7 PCI Bus Interface Registers
PMCSR
9
8
14.0 CN8236 Registers
CAPABILITY_PTR (0x50)
7
CACHE_LINE_SIZE
INTERRUPT_LINE
6
CAPABILITY_ID
REV_ID (0x00)
5
(0x00)
(0x01)
4
3 2 1 0
14-39