CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 390

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

16.0 Electrical and Mechanical Specifications
16.1 Timing
Figure 16-10. Synchronous PHY Interface Output Timing
16.1.6 Local Processor Interface Timing
Table 16-9. Synchronous Processor Interface Timing (1 of 2)
16-14
Symbol
t
is
Sync Output
SYSCLK
PCS* Input Setup
PAS* Input Setup
PBLAST* Input Setup
PWAIT* Input Setup
PADDR[1,0] Input Setup
PBSEL[1,0] Input Setup
PBE[3:0]* Input Setup
PWNR Input Setup
Timing for the local processor interface can be broken into two sections. The first
is the synchronous-to-SYSCLK interface of processor control signals to and from
the CN8236. The second is the interface to the SAR-shared memory and the
CN8236 control and status registers, which involves both SRAM and transceiver,
and buffer timing parameters that are not specified and are left up to the system
designer.
SYSCLK and the ready output of the CN8236 (PRDY*). The output loading of
these signals is 35 pF for the timing provided in
processor interface timing is provided in
interface timing is provided in
interfacing timing is provided in
t ov (max)
All of the synchronous interface signals are inputs to the CN8236 except for
(1)
(1)
t ov (min)
(1)
(1)
(1)
Parameter
(1)
(1)
(1)
Mindspeed Technologies
Synchronous Inputs
VALID
Table
ATM ServiceSAR Plus with xBR Traffic Management
Figures 16-13
16-10. Local interface processor and
™
Figures 16-11
t ov (max)
t ov (min)
Min
10
10
10
10
10
8
8
8
and 16-14.
Table
16-9. Synchronous
and 16-12. Memory
Max
VALID
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—
—
—
—
—
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28236-DSH-001-B
CN8236
Units
ns
ns
ns
ns
ns
ns
ns
ns
8236_116