CN8236EBGB Mindspeed Technologies, CN8236EBGB Datasheet - Page 351

• Manufacturer Part Number: CN8236EBGB
• Description: ATM SAR 155Mbps 3.3V ABR/CBR/GFR/UBR/VBR 388-Pin BGA
• Manufacturer: Mindspeed Technologies

Specifications of CN8236EBGB

• Package: 388BGA
• Traffic Class: ABR|CBR|GFR|UBR|VBR
• Utopia Type: Level 1|Level 2
• Host Interface: PCI
• Maximum Data Rate: 155 Mbps
• Typical Operating Supply Voltage: 3.3 V
• Minimum Operating Supply Voltage: 3 V

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
Table 14-7. 0x1e0—Local Processor Interrupt Status Register 0 (LP_ISTAT0)
28236-DSH-001-B
25–24
21–19
14–12
8–4
Bit
31
30
29
28
27
26
23
22
18
17
16
15
11
10
9
3
2
1
0
Field
Size
1
1
1
1
1
1
2
1
1
3
1
1
1
1
3
1
1
1
5
1
1
1
1
Type
—
—
—
—
—
—
—
E
E
E
E
L
E
L
L
E
L
L
E
E
E
E
E
RTC_OVFL
ALARM1
Reserved
LP_MBOX_WRITTEN
HOST_MBOX_READ
Reserved
Reserved
Reserved
LSTAT1
Reserved
GFC_LINK
RSM_RUN
RSM_HS_WRITE
RSM_LS_WRITE
Reserved
SEG_RUN
SEG_HS_WRITE
SEG_LS_WRITE
Reserved
AAL5_DSC_RLOVR
CELL_DSC_RLOVR
CELL_RCVD_RLOVR
CELL_XMIT_RLOVR
Mindspeed Technologies
Name
Clock register overflow.
Set when ALARM1 register matches CLOCK register.
Read as 0.
This bit is set upon a write to the LP_MBOX register by
the host processor.
This bit is set upon the read of the HOST_MBOX register
by the host processor.
Read as 0.
Read as 0.
Read as 0. Reserved for future status page expansion.
This bit is set when any bit in LP_ISTAT1 is set.
Read as 0.
Set when three consecutive received cells have GCF
SET_A, SET_B, or HALT bits set.
Set when the reassembly machine is running. Is high
when the RSM coprocessor is processing a cell.
Indicates reassembly host status has been written by
the CN8236 to status queues 0 through 15. For queue
number, read HOST_ST_WR which must be read in
order to clear status bit.
Indicates that a reassembly local status queue has been
written by the CN8236.
Read as 0.
Set when the segmentation machine is running. Is high
when SEG_ENABLE bit in SEG_CTRL is high or when
processing the last cell after SEG_ENABLE is set low.
Indicates segmentation host status has been written by
the CN8236 to status queues 0 through 15. For queue
number, read HOST_ST_WR, which must be read in
order to clear status bit.
Indicates that a segmentation local status queue has
been written by the CN8236.
Read as 0.
Set on the occurrence of an AAL5_DSC_CNT rollover.
Set on the occurrence of a CELL_DSC_CNT rollover.
Set on the occurrence of a CELL_RCVD_CNT rollover.
Set on the occurrence of a CELL_XMIT_CNT rollover.
™
14.6 Counters and Status Registers
Description
14.0 CN8236 Registers
14-35