LPC2420_60

Manufacturer Part NumberLPC2420_60
DescriptionNXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
ManufacturerNXP Semiconductors
LPC2420_60 datasheet
 
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NXP Semiconductors
5. Block diagram
LPC2420/2460
P0, P1, P2,
P3, P4
HIGH-SPEED
GPI/O
160 PINS
TOTAL
AHB2
ETHERNET
MII/RMII
MAC WITH
(1)
DMA
EINT3 to EINT0
EXTERNAL INTERRUPTS
P0, P2
2 × CAP0/CAP1/
CAPTURE/COMPARE
CAP2/CAP3
TIMER0/TIMER1/
4 × MAT2/MAT3,
TIMER2/TIMER3
2 × MAT0,
3 × MAT1
6 × PWM0/PWM1
PWM0, PWM1
1 × PCAP0,
2 × PCAP1
LEGACY GPI/O
P0, P1
64 PINS TOTAL
8 × AD0
A/D CONVERTER
D/A CONVERTER
AOUT
VBAT
2 kB BATTERY RAM
power domain 2
RTCX1
RTC
RTCX2
OSCILLATOR
ALARM
WATCHDOG TIMER
SYSTEM CONTROL
(1) LPC2460 only.
Fig 1. LPC2420/2460 block diagram
LPC2420_60
Product data sheet
TMS
TDI
trace signals
TRST
TCK TDO
EXTIN0
64 kB
TEST/DEBUG
SRAM
INTERFACE
INTERNAL
ARM7TDMI-S
SRAM
CONTROLLER
AHB
AHB
BRIDGE
BRIDGE
16 kB
MASTER
AHB TO
SLAVE
SRAM
PORT
AHB BRIDGE
PORT
(1)
AHB TO
APB BRIDGE
REAL-
TIME
CLOCK
All information provided in this document is subject to legal disclaimers.
Rev. 6.1 — 22 September 2011
LPC2420/2460
Flashless 16-bit/32-bit microcontroller
XTAL1
XTAL2
V
DD(3V3)
V
DDA
RESET
DBGEN
SYSTEM
PLL
FUNCTIONS
system
INTERNAL RC
clock
OSCILLATOR
EXTERNAL
16 kB
VIC
MEMORY
SRAM
CONTROLLER
AHB1
USB DEVICE/
HOST/OTG WITH
4 kB RAM AND DMA
GP DMA
CONTROLLER
2
I
S INTERFACE
SPI, SSP0 INTERFACE
SSP1 INTERFACE
SD/MMC CARD
INTERFACE
UART0, UART2, UART3
UART1
(1)
(1)
CAN1
, CAN2
2
2
2
I
C0, I
C1, I
C2
002aad313
VREF
V
, V
, V
SSA
SSCORE
SSIO
V
DD(DCDC)(3V3)
D[31:0]
A[23:0]
control lines
V
BUS
port1
port2
I2SRX_CLK
I2STX_CLK
I2SRX_WS
I2STX_WS
I2SRX_SDA
I2STX_SDA
SCK, SCK0
MOSI, MOSI0
MISO, MISO0
SSEL, SSEL0
SCK1
MOSI1
MISO1
SSEL1
MCICLK, MCIPWR
MCICMD,
MCIDAT[3:0]
TXD0, TXD2, TXD3
RXD0, RXD2, RXD3
TXD1
RXD1
DTR1, RTS1
DSR1, CTS1, DCD1,
RI1
RD1, RD2
TD1, TD2
SCL0, SCL1, SCL2
SDA0, SDA1, SDA2
© NXP B.V. 2011. All rights reserved.
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