LPC2420_60 NXP Semiconductors, LPC2420_60 Datasheet - Page 76

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LPC2420_60

Manufacturer Part Number
LPC2420_60
Description
NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded trace
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC2420_60
Product data sheet
14.5 XTAL and RTCX Printed Circuit Board (PCB) layout guidelines
14.6 Standard I/O pin configuration
The crystal should be connected on the PCB as close as possible to the oscillator input
and output pins of the chip. Take care that the load capacitors C
third overtone crystal usage have a common ground plane. The external components
must also be connected to the ground plain. Loops must be made as small as possible in
order to keep the noise coupled in via the PCB as small as possible. Also parasitics
should stay as small as possible. Values of C
accordingly to the increase in parasitics of the PCB layout.
Figure 32
The default configuration for standard I/O pins is input with pull-up enabled. The weak
MOS devices provide a drive capability equivalent to pull-up and pull-down resistors.
Fig 32. Standard I/O pin configuration with analog input
as digital output
as analog input
as digital input
pin configured
pin configured
pin configured
Digital output driver
Digital input: Pull-up enabled/disabled
Digital input: Pull-down enabled/disabled
Analog input (for ADC input channels)
driver
shows the possible pin modes for standard I/O pins with analog input function:
All information provided in this document is subject to legal disclaimers.
Rev. 6.1 — 22 September 2011
analog input
data input
output
output enable
pull-down enable
pull-up enable
select analog input
x1
and C
Flashless 16-bit/32-bit microcontroller
x2
should be chosen smaller
V
LPC2420/2460
DD
weak
pull-up
weak
pull-down
x1
, C
x2
, and C
© NXP B.V. 2011. All rights reserved.
V
ESD
DD
ESD
V
SS
x3
in case of
002aaf496
76 of 86
PIN

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