mc68hc705v12 Freescale Semiconductor, Inc, mc68hc705v12 Datasheet - Page 57

• Manufacturer Part Number: mc68hc705v12
• Description: M68hc05-based Mcu Hc05 Freescale Semiconductor
• Manufacturer: Freescale Semiconductor, Inc

MC68HC705V12
—
Rev. 3.0
Because the M68HC05 CPU does not support interruptible instructions,
the maximum latency to the first instruction of the interrupt service
routine must include the longest instruction execution time plus stacking
overhead.
A return-from-interrupt (RTI) instruction is used to signify when the
interrupt software service routine is completed. The RTI instruction
causes the register contents to be recovered from the stack and normal
processing to resume at the next instruction that was to be executed
when the interrupt took place.
that occur during interrupt processing.
Register
CTSCR
CTSCR
Latency = (Longest instruction execution time + 10) x t
Freescale Semiconductor, Inc.
BSVR
SPSR
SSCR
ISCR
TSR
TSR
TSR
N/A
N/A
For More Information On This Product,
Table 4-1. Vector Address for Interrupts and Reset
Go to: www.freescale.com
Flag Name
IRQF/IPCF
CTOF
SYNF
SPIF
OCF
RTIF
TOF
I3:I0
N/A
N/A
ICF
Interrupts
Reset
Software
External
Timer overflow
Output compare
Input capture
BDLC
SPI
Core timer overflow
Real time
Gauge synchronize
(IRQ and port C)
Interrupts
Figure 4-1
shows the sequence of events
Interrupt
CTIMER
CTIMER
GAUGE
RESET
TIMER
TIMER
TIMER
BDLC
CPU
SWI
IRQ
SPI
CPU Interrupt Processing
Advance Information
CYC
$3FFC–$3FFD
$3FFE–$3FFF
$3FFA–$3FFB
$3FF8–$3FF9
$3FF8–$3FF9
$3FF8–$3FF9
$3FF6–$3FF7
$3FF4–$3FF5
$3FF2–$3FF3
$3FF2–$3FF3
$3FF0–$3FF1
Address
Vector
seconds
Interrupts