mc68hc705v12 Freescale Semiconductor, Inc, mc68hc705v12 Datasheet - Page 82

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mc68hc705v12

Manufacturer Part Number
mc68hc705v12
Description
M68hc05-based Mcu Hc05 Freescale Semiconductor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Parallel Input/Output (I/O)
7.3 Port A
7.3.1 Port A Data Register
7.3.2 Port A Data Direction Register
Advance Information
INTERNAL HC05
DATA BUS
WRITE $0004
WRITE $0000
READ $0004
READ $0000
RESET
(RST)
Port A is a 7-bit bidirectional port which functions as shown in
Figure
direction register and a data register. The port A data register (PORTA)
is located at address $0000. The port A data direction register (DDRA)
is located at address $0004. Reset clears DDRA. The port A data
register is unaffected by reset.
Each port A I/O pin has a corresponding bit in the port A data register.
When a port A pin is programmed as an output, the state of the
corresponding data register bit determines the state of the output pin.
When a port A pin is programmed as an input, any read of the port A
data register will return the logic state of the corresponding I/O pin. The
port A data register is unaffected by reset.
Each port A I/O pin may be programmed as an input by clearing the
corresponding bit in the DDRA or programmed as an output by setting
the corresponding bit in the DDRA. The DDRA can be accessed at
address $0004 and is cleared by reset.
Freescale Semiconductor, Inc.
For More Information On This Product,
7-1. Each pin is controlled by the corresponding bit in a data
Figure 7-1. Port A I/O Circuitry
DATA DIRECTION
REGISTER BIT
REGISTER BIT
DATA
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Parallel Input/Output (I/O)
MC68HC705V12
OUTPUT
PIN
I/O
Rev. 3.0

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