peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 104

• Manufacturer Part Number: peb20534h-52
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

6.1.1.5
For situations, where the programmable constant number of 15 wait states is not
enough, or where the response (access) time of a peripheral is not constant, the DSCC4
EBC interface provides external bus cycles that are terminated via a LRDY input signal.
In this case the EBC first inserts a programmable number of waitstates (0...7) and then
monitors the LRDY line to determine the actual end of the current bus cycle. The external
device drives LRDY low in order to indicate that data have been latched (write cycle) or
are available (read cycle).
Figure 27
The LRDY function is enabled via bit ’RDYEN’ in the LBI Configuration register LCONF.
The LRDY signal is always synchronized at the input port pin. An asynchronous LRDY
signal that has been activated by an external device may be deactivated in response to
the trailing (rising) edge of the respective command (LRD or LWR).
Combining the LRDY function with predefined waitstates is advantageous in two cases.
Memory components with a fixed access time and peripherals operating with LRDY may
be grouped into the same address window. The (external) wait states control logic in this
case would activate LRDY either upon the memory’s chip select or with the peripheral’s
LRDY output. After the predefined number of waitstates the EBC will check its LRDY
line to determine the end of the bus cycle. For a memory access it will be low already,
for a peripheral access it may be delayed. As memories tend to be faster than
peripherals, there should be no impact on system performance.
When using the LRDY function with ’normally-ready’ peripherals, it may lead to
erroneous bus cycles, if the LRDY line is sampled too early. These peripherals pull their
LRDY output low, while they are idle. When they are accessed, they deactivate LRDY
Data Sheet
LALE
LRD/LWR
LRDY
Data OUT
Ready Signal Controlled Bus Cycles
LRDY Controlled Bus Cycles
104
Multi Function Port (MFP)
PEB 20534
PEF 20534
2000-05-30
ITD10614