peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 123

• Manufacturer Part Number: peb20534h-52
• Description: Dma Supported Serial Communication Controller With 4 Channels
• Manufacturer: Infineon Technologies Corporation

Figure 37
Continuous Transfers:
When the transmit interrupt request flag is set, it indicates that the transmit buffer SSCTB
is empty and ready to be loaded with the next transmit data. If SSCTB has been reloaded
by the time the current transmission is finished, the data is immediately transferred to the
shift register and the next transmission will start without any additional delay. On the data
line there is no gap between the two successive frames. For example, two byte transfers
would look the same as one word transfer. This feature can be used to interface with
devices which can operate with or require more than 16 data bits per transfer. The length
of a total data frame is up to the software. This option can also be used to interface to
byte-wide and word-wide devices on the same serial bus.
Note: This feature only applies to multiples of the selected basic data width, since it
Data Sheet
would require disabling/enabling of the SSC to re-program the basic data width
on-the-fly.
Master
Shift Register
SSC Half Duplex Configuration
Clock
Device
MTSR
CLK
MRST
1
Clock
123
Common
Transmit/
Receive
Line
Device
Device
MTSR
MTSR
MRST
MRST
CLK
CLK
2
3
Multi Function Port (MFP)
Clock
Clock
Shift Register
Shift Register
PEB 20534
PEF 20534
MCS01965
Slave
Slave
2000-05-30