DS2151 Dallas Semiconducotr, DS2151 Datasheet - Page 11

• Manufacturer Part Number: DS2151
• Description: T1 Single-Chip Transceiver
• Manufacturer: Dallas Semiconducotr

TCR2: TRANSMIT CONTROL REGISTER 2 (Address=36 Hex)
OUTPUT PIN TEST MODES Table 3-1
TEST1
(MSB)
TEST1
0
0
1
1
SYMBOL
TZBTSI
TD4YM
TEST1
TEST0
TSDW
TSIO
B7ZS
TSM
TEST0
TEST0
0
1
0
1
POSITION NAME AND DESCRIPTION
XTCR2.0
TCR2.7
TCR2.6
TCR2.5
TCR2.2
TCR2.1
TCR2.4
TCR2.3
TZBTSI
operate normally
force all output pins 3-state (including all I/O pins and parallel port pins)
force all output pins low (including all I/O pins except parallel port pins)
force all output pins high (including all I/O pins except parallel port pins)
Test Mode Bit 1 for Output Pins. See Table 3-1.
Test Mode Bit 0 for Output Pins. See Table 3-1.
Transmit Side ZBTSI Enable.
0=ZBTSI disabled
1=ZBTSI enabled
TSYNC Double-Wide. (note: this bit must be set to 0 when
TCR2.3=1 or when TCR2.2=0)
0=do not pulse double-wide in signaling frames
1=do pulse double-wide in signaling frames
TSYNC Mode Select.
0=frame mode (see the timing in Section 13)
1=multiframe mode (see the timing in Section 13)
TSYNC I/O Select.
0=TSYNC is an input
1=TSYNC is an output
Transmit Side D4 Yellow Alarm Select.
0=0s in bit 2 of all channels
1=a 1 in the S-bit position of frame 12
Bit 7 0 Suppression Enable.
0=no stuffing occurs
1=Bit 7 force to a 1 in channels with all 0s
TSDW
11 of 51
EFFECT ON OUTPUT PINS
TSM
TSIO
TD4YM
(LSB)
B7ZS
DS2151Q