DS2151 Dallas Semiconducotr, DS2151 Datasheet - Page 19

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DS2151

Manufacturer Part Number
DS2151
Description
T1 Single-Chip Transceiver
Manufacturer
Dallas Semiconducotr
Datasheet

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SR1: STATUS REGISTER 1 (Address=20 Hex)
DS2151Q ALARM SET AND CLEAR CRITERIA Table 4-2
Blue Alarm (AIS) (see note 1
below)
Yellow Alarm
1. D4 bit 2 mode (RCR2.2=0)
2. D4 12
3. ESF Mode
Red Alarm (RCL) (this alarm is
also referred to as Loss of Signal)
(MSB)
LUP
(RCR2.2=1; this mode is also
referred to as the “Japanese
Yellow Alarm”)
th
SYMBOL POSITION NAME AND DESCRIPTION
F-bit mode
ALARM
RSLIP
LOTC
RYEL
RLOS
LDN
LDN
RBL
RCL
LUP
SR1.7
SR1.6
SR1.5
SR1.4
SR1.3
SR1.2
SR1.1
SR1.0
LOTC
when over a 3 ms window, five
or less 0s are received
when bit 2 of 256 consecutive
channels is set to 0 for at least
254 occurrences
when the 12
to
occurrences
when 16 consecutive patterns of
00FF hex appear in the FDL
when 192 consecutive 0s are
received
Loop Up Code Detected. Set when the repeating ...00001...
loop up code is being received.
Loop Down Code Detected. Set when the repeating ...001...
loop down code is being received.
Loss of Transmit Clock. Set when the TCLK pin has not
transitioned for one channel time (or 5.2 us). Will force pin 16
high if enabled via CCR1.6. Based on RCLK.
Receive Elastic Store Slip Occurrence. Set when the receive
elastic store has either repeated or deleted a frame.
Receive Blue Alarm. Set when a blue alarm is received at
RTIP and RRING. See note below.
Receive Yellow Alarm. Set when a yellow alarm is received at
RTIP and RRING.
Receive Carrier Loss. Set when 192 consecutive 0s have been
detected at RTIP and RRING.
Receive Loss of Sync. Set when the device is not synchronized
to the receive T1 stream.
1
RSLIP
SET CRITERIA
for
19 of 51
th
two
framing bit is set
consecutive
RBL
RYEL
when over a 3 ms window, six or
more 0s are received
when bit 2 of 256 consecutive
channels is set to 0 for less than
254 occurrences
when the 12
to
occurrences
when 14 or less patterns of 00FF
hex out of 16 possible appear in
the FDL
when 14 or more 1s out of 112
possible
received starting with the first 1
received
0
CLEAR CRITERIA
for
bit
th
RCL
two
framing bit is set
positions
consecutive
(LSB)
RLOS
DS2151Q
are

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