DS2151 Dallas Semiconducotr, DS2151 Datasheet - Page 2

• Manufacturer Part Number: DS2151
• Description: T1 Single-Chip Transceiver
• Manufacturer: Dallas Semiconducotr

DS2151Q
TABLE OF CONTENTS
1. Introduction
2. Parallel Control Port
3. Control Registers
4. Status and Information Registers
5. Error Count Registers
6. FDL/Fs Extraction/Insertion
7. Signaling Operation
8. Transmit Transparency and Idle Registers
9. Clock Blocking Registers
10. Elastic Stores Operation
11. Receive Mark Registers
12. Line Interface Functions
13. Timing Diagrams and Transmit Flow Diagram
14. DC and AC Characteristics
1.0
INTRODUCTION
The analog AMI waveform off of the T1 line is transformer coupled into the RRING and RTIP pins of
the DS2151Q. The device recovers clock and data from the analog signal and passes it through the jitter
attenuation mux to the receive side framer where the digital serial stream is analyzed to locate the framing
pattern. If needed, the receive side elastic store can be enabled in order to absorb the phase and frequency
differences between the recovered T1 data stream and an asynchronous backplane clock which is
provided at the SYSCLK input.
The transmit side of the DS2151Q is totally independent from the receive side in both the clock
requirements and characteristics. Data can be either provided directly to the transmit formatter or via an
elastic store. The transmit formatter will provide the necessary data overhead for T1 transmission. Once
the data stream has been prepared for transmission, it is sent via the jitter attenuation mux to the
waveshaping and line driver functions. The DS2151Q will drive the T1 line from the TTIP and TRING
pins via a coupling transformer.
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