DS2151 Dallas Semiconducotr, DS2151 Datasheet - Page 18

• Manufacturer Part Number: DS2151
• Description: T1 Single-Chip Transceiver
• Manufacturer: Dallas Semiconducotr

RIR2: RECEIVE INFORMATION REGISTER 2 (Address=31 Hex)
DS2151Q RECEIVE T1 LEVEL INDICATION Table 4-1
(MSB)
RL1
RL1
0
0
1
1
SYMBOL POSITION NAME AND DESCRIPTION
TSLIP
RPDV
TPDV
TESE
TESF
JALT
RL0
RL1
RL0
RL0
0
1
0
1
RIR2.7
RIR2.6
RIR2.5
RIR2.4
RIR2.3
RIR2.2
RIR2.1
RIR2.0
TESF
Receive Level Bit 1. See Table 4-1.
Receive Level Bit 0. See Table 4-1.
Transmit Elastic Store Full. Set when the transmit elastic
store buffer fills and a frame is deleted.
Transmit Elastic Store Empty. Set when the transmit elastic
store buffer empties and a frame is repeated.
Transmit Elastic Store Slip Occurrence.
transmit elastic store has either repeated or deleted a frame.
Jitter Attenuator Limit Trip. Set when the jitter attenuator
FIFO reaches to within 4 bits of its limit; useful for debugging
jitter attenuation operation.
Receive Pulse Density Violation. Set when the receive data
stream does not meet the ANSI T1.403 requirements for pulse
density.
Transmit Pulse Density Violation. Set when the transmit data
stream does not meet the ANSI T1.403 requirements for pulse
density.
TESE
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TYPICAL LEVEL RECEIVED
TSLIP
-15 dB to -22.5 dB
less than -22.5 Db
-7.5 dB to -15 dB
+2 dB to -7.5 dB
JALT
RPDV
Set when the
(LSB)
TPDV
DS2151Q