PEB3265 Infineon Technologies Corporation, PEB3265 Datasheet - Page 223

• Manufacturer Part Number: PEB3265
• Description: (PEB326x / PEB426x) Dual Channel Slicofi-2 / Slic Duslic
• Manufacturer: Infineon Technologies Corporation

Preliminary
Bit
Register setting is only active if bit TEST-EN in register LMCR1 is set to 1.
DC-POFI-HI
DC-HOLD
Data Sheet
2D
H
TSTR5
7
0
Higher value for DC post filter limit
DC-POFI-HI = 0
DC-POFI-HI = 1
Actual DC output value hold (value of the last DSP filter stage will be
kept)
DC-HOLD = 0
DC-HOLD = 1
6
0
Test Register 5
5
0
SLICOFI-2x Command Structure and Programming
Limit frequency is set to 100 Hz (normal operation).
Limit frequency is set to 300 Hz.
Normal operation.
DC output value hold.
POFI-
DC-
HI
4
223
HOLD
DC-
3
2
0
00
DuSLIC-E/-E2/-P
H
1
0
T
2000-07-14
0
0
Y