PEB3265 Infineon Technologies Corporation, PEB3265 Datasheet - Page 32

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PEB3265

Manufacturer Part Number
PEB3265
Description
(PEB326x / PEB426x) Dual Channel Slicofi-2 / Slic Duslic
Manufacturer
Infineon Technologies Corporation
Datasheet

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Preliminary
Table 4
Pin
No.
52 ITA
53 VCMITA I
54 VDDR
55 GNDR
56 VCMS
57 VCM
58 CREF
59 SELCLK I
60 VCMITB I
61 ITB
62 ITACB
63 ILB
64 C1B
1)
Data Sheet
If SLIC-P is selected, IO2 cannot be controlled by the user, but is utilized by the SLICOFI-2 to control the C3
pin of SLIC-P.
Symbol Input (I)
Pin Definitions and Functions SLICOFI-2/-2S/-2S2 (cont’d)
Output (O)
I
Power
Power
O
O
I/O
I
I
I
I/O
Function
Transversal current input (AC + DC) (channel A)
Reference pin for trans./long. current sensing (channel A)
+ 3.3 V analog supply voltage (bias)
Analog ground (bias)
Reference voltage for differential two-wire interface, typical
1.5 V
Reference voltage for input pins IT, IL, ITAC
An external capacitor of 68 nF has to be connected to
GNDR
Master clock select. Should be set to GND (internal master
clock generation). For test purposes, external master clock
generation can be selected (SELCLK = 1). In this case a
clock of nominal 32.768 Mhz with a jitter time of less than
1 ns has to be applied to the MCLK pin.
Reference pin for transversal/longitudinal current sensing
(channel B)
Transversal current input (AC + DC) (channel B)
Transversal current input (AC) (channel B)
Longitudinal current input (channel B)
Ternary logic output, controlling the SLIC operation mode
(channel B);
indicating thermal overload of SLIC if a current of typically
150 A is drawn out
32
Pin Descriptions
2000-07-14
DuSLIC

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