PEB3265 Infineon Technologies Corporation, PEB3265 Datasheet - Page 374

• Manufacturer Part Number: PEB3265
• Description: (PEB326x / PEB426x) Dual Channel Slicofi-2 / Slic Duslic
• Manufacturer: Infineon Technologies Corporation

Preliminary
8.3
• For each of the supply pins of SLICOFI-2x and SLIC, 100 nF capacitors should be
• SLICOFI-2x and SLIC should be placed as close to each other as possible.
• SLICOFI-2x and SLIC should be placed in such way that lines ACP, ACN, DCP, DCN,
• ACP/ACN lines should be placed parallel and symmetrical;
• DCP/DCN lines should be placed parallel and symmetrical;
• VCMITA and VCM should be connected directly (VCMITA via
• VCMITB and VCM should be connected directly (VCMITB via
• Use separate traces for connecting VCM/VCMITA and VCM/VCMITB
• In case of a multilayer board it is recommended to use one common ground layer
• In case of a two-layer board a common ground should be used for AGND, BGND,
• The connection of GND,
• Tip/ring traces from the SLIC should be symmetrical
Data Sheet
used. These capacitors should be placed as close as possible to the supply pin of the
associated ground/supply pins
IT, ITAC are as short as possible
via holes should be avoided
ACP/ACN lines should be run above a GND plane;
via holes should be avoided
DCP/DCN lines should be run above a GND plane
R
R
these two VCM traces should be connected directly at the VCM pin of SLICOFI-2x
(AGND, BGND, GNDD, GNDA, GNDB, GNDPLL connected together and share one
ground layer)
GNDD, GNDA, GNDB and GNDPLL. Ground traces should be layed out as large as
possible. Connections to and from groud pins should be as short as possible. Any
unused area of the board should be filled with ground (copper pouring)
impedance in order to avoid, e.g., a GND shift due to the high impulse currents in case
of an overvoltage strike.
IT2A
IT2B
(680 )
(680 )
DuSLIC Layout Recommendation
V
H
and
V
BAT
374
to the protection devices should be low-
Application Circuits
C
C
VCMITA
VCMITB
) at resistor
) at resistor
2000-07-14
DuSLIC