S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 133

• Manufacturer Part Number: S9S12G128F0VLL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G128F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 86
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

1
Freescale Semiconductor
Package Pin
The regular I/O characteristics (see
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
PAD11
VDDA
VSSA
PAD3
PAD4
PAD5
PAD6
PAD7
PM0
PM1
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
Pin
Table 1-29. 48-Pin LQFP Pinout for S12GA192 and S12GA240
<----lowest-----PRIORITY-----highest---->
API_EXTCLK
KWAD11
KWAD3
KWAD4
KWAD5
KWAD6
KWAD7
MISO0
MOSI0
Func.
RXD0
RXD1
RXD2
TXD0
TXD1
SCK0
TXD2
VRH
2nd
—
Section A.2, “I/O
MC9S12G Family Reference Manual, Rev.1.23
Function
RXCAN
TXCAN
Func.
ECLK
AN11
AN3
AN4
AN5
AN6
AN7
3rd
—
—
—
—
—
—
—
—
—
Characteristics”) apply if the EXTAL/XTAL function is disabled
DACU0
Func
SS0
4th
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
AMP0
Func
5th
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Supply
Power
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DDA
DDA
DDA
DDA
DDA
DDA
—
—
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
PER1AD/PPS1AD
PER0AD/PPS0AD
PER1AD/PPS1AD
PER1AD/PPS0AD
PER1AD/PPS1AD
PER1AD/PPS1AD
Device Overview MC9S12G-Family
PERM/PPSM
PERM/PPSM
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
CTRL
—
—
Internal Pull
Resistor
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Reset
State
Up
Up
Up
Up
Up
Up
Up
Up
—
—
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