S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 250

• Manufacturer Part Number: S9S12G128F0VLL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G128F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 86
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

Port Integration Module (S12GPIMV1)
2.5.4
This section describes the interrupts generated by the PIM and their individual sources. Vector addresses
and interrupt priorities are defined at MCU level.
2.5.4.1
The XIRQ pin allows requesting non-maskable interrupts after reset initialization. During reset, the X bit
in the condition code register is set and any interrupts are masked until software enables them.
The IRQ pin allows requesting asynchronous interrupts. The interrupt input is disabled out of reset. To
enable the interrupt the IRQCR[IRQEN] bit must be set and the I bit cleared in the condition code register.
The interrupt can be configured for level-sensitive or falling-edge-sensitive triggering. If IRQCR[IRQEN]
is cleared while an interrupt is pending, the request will deassert.
252
1
2
3
Always “0” on port A, B, C, D, BKGD. Always “1” on port E
Applicable only on port P, J and AD.
Port AD: Assuming digital input buffer enabled in ADC module (ATDDIEN) and ACMP module (ACDIEN)
DDR
Interrupts
0
0
0
0
0
0
0
1
1
1
1
XIRQ, IRQ Interrupts
IO
0
1
0
1
x
x
x
x
x
x
x
XIRQ
IRQ
Port P pin interrupt
Port J pin interrupt
Port AD pin interrupt
Module Interrupt Sources
PE
0
1
1
0
0
1
1
x
x
x
x
MC9S12G Family Reference Manual,
Table 2-92. Pin Configuration Summary
Table 2-93. PIM Interrupt Sources
PS
x
0
1
0
1
0
1
x
x
0
1
1
IE
0
0
0
1
1
1
1
0
0
1
1
2
None
IRQCR[IRQEN]
PIEP[PIEP7-PIEP0]
PIEJ[PIEJ7-PIEJ0]
PIE0AD[PIE0AD7-PIE0AD0]
PIE1AD[PIE1AD7-PIE1AD0]
Input
Input
Input
Input
Input
Input
Input
Output, drive to 0
Output, drive to 1
Output, drive to 0
Output, drive to 1
3
3
3
3
3
3
3
Local Enable
Function
Rev.1.23
Disabled
Pullup
Pulldown
Disabled
Disabled
Pullup
Pulldown
Disabled
Disabled
Disabled
Disabled
Pull Device
Freescale Semiconductor
Disabled
Disabled
Disabled
Falling edge
Rising edge
Falling edge
Rising edge
Disabled
Disabled
Falling edge
Rising edge
Interrupt