S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 507

• Manufacturer Part Number: S9S12G128F0VLL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G128F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 86
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

14.3.2.6
Writes to this register will abort current conversion sequence and start a new conversion sequence. If the
external trigger function is enabled (ETRIGE=1) an initial write to ATDCTL5 is required to allow starting
of a conversion sequence which will then occur on each trigger event. Start of conversion means the
beginning of the sampling phase.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0005
Reset
SCAN
Field
SC
6
5
W
R
Special Channel Conversion Bit — If this bit is set, then special channel conversion can be selected using CD,
CC, CB and CA of ATDCTL5.
0 Special channel conversions disabled
1 Special channel conversions enabled
Continuous Conversion Sequence Mode — This bit selects whether conversion sequences are performed
continuously or only once. If the external trigger function is enabled (ETRIGE=1) setting this bit has no effect,
thus the external trigger always starts a single conversion sequence.
0 Single conversion sequence
1 Continuous conversion sequences (scan mode)
ATD Control Register 5 (ATDCTL5)
0
0
7
= Unimplemented or Reserved
SMP2
SC
0
6
1
Figure 14-8. ATD Control Register 5 (ATDCTL5)
Table 14-14. ATDCTL5 Field Descriptions
MC9S12G Family Reference Manual, Rev.1.23
SMP1
SCAN
Table 14-13. Sample Time Select
Table 14-15
1
0
5
SMP0
lists the coding.
MULT
1
0
4
Description
ATD Clock Cycles
CD
0
3
Sample Time
in Number of
24
Analog-to-Digital Converter (ADC12B12CV2)
CC
0
2
CB
0
1
CA
0
0
509