S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 924

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S9S12G128F0VLL

Manufacturer Part Number
S9S12G128F0VLL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G128F0VLL

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
86
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

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48 KByte Flash Module (S12FTMRG48K1V1)
26.4.6.16 Erase EEPROM Sector Command
The Erase EEPROM Sector operation will erase all addresses in a sector of the EEPROM block.
Upon clearing CCIF to launch the Erase EEPROM Sector command, the Memory Controller will erase the
selected Flash sector and verify that it is erased. The CCIF flag will set after the Erase EEPROM Sector
operation has completed.
926
Register
Register
FSTAT
FSTAT
Table 26-64. Erase EEPROM Sector Command FCCOB Requirements
CCOBIX[2:0]
MGSTAT1
MGSTAT0
MGSTAT1
MGSTAT0
ACCERR
Table 26-65. Erase EEPROM Sector Command Error Handling
ACCERR
Error Bit
Error Bit
000
001
FPVIOL
FPVIOL
Table 26-63. Program EEPROM Command Error Handling
MC9S12G Family Reference Manual,
Global address [15:0] anywhere within the sector to be erased.
Set if CCOBIX[2:0] < 010 at command launch
Set if CCOBIX[2:0] > 101 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is supplied
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the requested group of words breaches the end of the EEPROM block
Set if the selected area of the EEPROM memory is protected
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
Set if CCOBIX[2:0] != 001 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is suppliedsee
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the selected area of the EEPROM memory is protected
Set if any errors have been encountered during the verify operation
Set if any non-correctable errors have been encountered during the verify
operation
See
0x12
Section 26.1.2.2
FCCOB Parameters
for EEPROM sector size.
Global address [17:16] to identify
Error Condition
Error Condition
Rev.1.23
EEPROM block
Table
Table
Table
26-27)
26-27)
26-3)
Freescale Semiconductor

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