S9S12G128F0VLL Freescale Semiconductor, S9S12G128F0VLL Datasheet - Page 258

• Manufacturer Part Number: S9S12G128F0VLL
• Description: 16-bit Microcontrollers - MCU 16BIT 128K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G128F0VLL

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 1 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit, 12 bit
• A/d Channels Available: 12
• Interface Type: SPI
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 86
• Number Of Timers: 8
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 3.13 V

1
5V Analog Comparator (ACMPV1)
3.6.2.2
260
Address 0x0261
ACDIEN
ACMOD
Read: Anytime
Write:
ACICE
Field
[1:0]
ACE
Reset
3-2
5
4
0
ACIF: Anytime, write 1 to clear
ACO: Never
W
R
ACMP Input Capture Enable—
Establishes internal link to a timer input capture channel. When enabled, the associated timer pin is disconnected
from the timer input. Refer to ACE description to account for initialization delay on this path.
0 Timer link disabled
1 ACMP output connected to input capture channel 5
ACMP Digital Input Buffer Enable—
Enables the input buffers on ACMPP and ACMPM for the pins to be used with digital functions.
Note: If this bit is set while simultaneously using the pin as an analog port, there is potentially increased power
0 Input buffers disabled on ACMPP and ACMPM
1 Input buffers enabled on ACMPP and ACMPM
ACMP Mode—
Selects the type of compare event setting ACIF.
00 Flag setting disabled
01 Comparator output rising edge
10 Comparator output falling edge
11 Comparator output rising or falling edge
ACMP Enable—
This bit enables the ACMP module and takes it into normal mode (see
also connects the related input pins with the module’s low pass input filters. When the module is not enabled, it
remains in low power shutdown mode.
Note: After setting ACE=1 an initialization delay of 63 bus clock cycles must be accounted for. During this time the
0 ACMP disabled
1 ACMP enabled
ACIF
ACMP Status Register (ACMPS)
0
7
consumption because the digital input buffer may be in the linear region.
comparator output path to all subsequent logic (ACO, ACIF, timer link, excl. ACMPO) is held at its current state.
When resetting ACE to 0 the current state of the comparator will be maintained.
Table 3-2. ACMPC Register Field Descriptions (continued)
ACO
0
6
Figure 3-4. ACMP Status Register (ACMPS)
MC9S12G Family Reference Manual,
0
0
5
0
0
4
Description
3
0
0
Rev.1.23
Section 3.5, “Modes of
0
0
2
Freescale Semiconductor
Access: User read/write
0
0
1
Operation”). This bit
0
0
0
1