DK-DEV-2AGX260N Altera, DK-DEV-2AGX260N Datasheet - Page 15

KIT DEV FPGA 2AGX260 W/6.375G TX

DK-DEV-2AGX260N

Manufacturer Part Number
DK-DEV-2AGX260N
Description
KIT DEV FPGA 2AGX260 W/6.375G TX
Manufacturer
Altera
Series
Arria II GXr
Type
FPGAr
Datasheets

Specifications of DK-DEV-2AGX260N

Contents
Board, Cables, CD, DVD, Power Supply
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Arria
Silicon Core Number
EP2
Silicon Family Name
Arria II GX
Rohs Compliant
Yes
For Use With/related Products
EP2AGX260
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2696

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-DEV-2AGX260N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-DEV-2AGX260N
Manufacturer:
ALTERA
0
Introduction
Setting Up the Board
July 2010 Altera Corporation
f
1
The instructions in this chapter explain how to set up the Arria II GX FPGA
development board, 6G edition.
To prepare and apply power to the board, perform the following steps:
1. The Arria II GX FPGA development board, 6G edition ships with its board
2. The FPGA development board, 6G edition ships with design examples stored in
3. Connect the DC adapter (+16 V, 3.75 A) to the DC power jack (J4) on the FPGA
4. Set the POWER switch (SW1) to the on position. When power is supplied to the
The MAX II device on the board contains (among other things) a parallel flash loader
(PFL) megafunction. When the board powers up, the PFL reads a design from flash
memory and configures the FPGA. The USR LOAD switch (SW4.4) controls which
design to load. When the switch is in the off position, the PFL loads the design from
the factory portion of flash memory. When the switch is in the on position, the PFL
loads the design from the user hardware 1 portion of flash memory.
The kit includes a MAX II design which contains the MAX II PFL megafunction. The
design resides in the <install dir>\kits\arriaIIGX_2agx260_fpga\examples\max2
directory.
When configuration is complete, the CONF DONE LED (D14) illuminates, signaling
that the Arria II GX device configured successfully.
For more information about the PFL megafunction, refer to
Loader with the Quartus II
switches preconfigured to support the design examples in the kit. If you suspect
your board might not be currently configured with the default settings, follow the
instructions in
to its factory settings before proceeding.
the flash memory device. Verify the USR LOAD switch (SW4.4) is set to the off
position to load the design stored in the factory portion of flash memory.
Figure 4–1
board, 6G edition.
board and plug the cord into a power outlet.
c
board, a blue LED (D18) illuminates indicating that the board has power.
Use only the supplied power supply. Power regulation circuitry on the
board can be damaged by power supplies with greater voltage.
shows the switch location on the Arria II GX FPGA development
“Factory Default Switch Settings” on page 4–2
Software.
4. Development Board Setup
Arria II GX FPGA Development Kit, 6G Edition User Guide
Using the Parallel Flash
to return the board

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