DK-DEV-2AGX260N Altera, DK-DEV-2AGX260N Datasheet - Page 24

• Manufacturer Part Number: DK-DEV-2AGX260N
• Description: KIT DEV FPGA 2AGX260 W/6.375G TX
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX260N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX260
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2696

6–4
Using the Board Test System
Arria II GX FPGA Development Kit, 6G Edition User Guide
The Configure Menu
The Config Tab
1
If you power up your board with the USR LOAD switch (SW4.4) in the off position, or
if you load your own design into the FPGA with the Quartus II Programmer, you
receive a message prompting you to configure your board with a valid Board Test
System design. Refer to
your board.
This section describes each control in the Board Test System application.
Each test design tests different functionality and corresponds to one or more
application tabs. Use the Configure menu to select the design you want to use.
Figure 6–2
Figure 6–2. The Configure Menu
To configure the FPGA with a test system design, perform the following steps:
1. On the Configure menu, click the configure command that corresponds to the
2. In the dialog box that appears, click Download Start to download the
3. When configuration finishes, close the Quartus II Programmer. The design begins
The Config tab shows information about the board’s current configuration.
Figure 6–1 on page 6–2
MAX II registers, the JTAG chain, the board’s MAC address, the flash memory map,
and other details stored on the board.
The following sections describe the controls on the Config tab.
Board Information
The Board information controls display static information about your board.
functionality you wish to test.
corresponding design’s SRAM Object File (.sof) to the FPGA. The download
process usually takes about a minute.
running in the FPGA. The corresponding GUI application tabs that interface with
the design enable.
shows the Configure menu.
shows the Config tab. The tab displays the contents of the
“The Configure Menu”
for information about configuring
Chapter 6: Board Test System
July 2010 Altera Corporation
Using the Board Test System