DK-DEV-2AGX260N Altera, DK-DEV-2AGX260N Datasheet - Page 19

• Manufacturer Part Number: DK-DEV-2AGX260N
• Description: KIT DEV FPGA 2AGX260 W/6.375G TX
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX260N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX260
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2696

Introduction
Connecting to the Board Update Portal Web Page
July 2010 Altera Corporation
1
1
The Arria II GX FPGA Development Kit, 6G Edition ships with the Board Update
Portal design example stored in the factory portion of the flash memory on the board.
The design consists of a Nios II embedded processor, an Ethernet MAC, and an
HTML web server.
When you power up the board with the USR LOAD switch (SW4.4) in the off position,
the Arria II GX FPGA configures with the Board Update Portal design example. The
design can obtain an IP address from any DHCP server and serve a web page from the
flash on your board to any host computer on the same network. The web page allows
you to upload new FPGA designs to the user hardware 1 portion of flash memory,
and provides links to useful information on the Altera website, including links to
kit-specific and design resources.
After successfully updating the user hardware 1 flash memory, you can load the user
design from flash memory into the FPGA. To do so, set the USR LOAD switch (SW4.4)
to the on position and power cycle the board.
The source code for the Board Update Portal design resides in the <install
dir>\kits\arriaIIGX_2agx260_fpga\examples directory. If the Board Update Portal is
corrupted or deleted from the flash memory, refer to
the Factory Settings” on page A–4
contents.
This section provides instructions to connect to the Board Update Portal web page.
Before you proceed, ensure that you have the following:
■
■
■
To connect to the Board Update Portal web page, perform the following steps:
1. With the board powered down, set the USR LOAD switch (SW4.4) to the off
2. Attach the Ethernet cable from the board to your LAN.
3. Power up the board. The board connects to the LAN’s gateway router, and obtains
4. Launch a web browser on a PC that is connected to the same network, and enter
A PC with a connection to a working Ethernet port on a DHCP enabled network.
A separate working Ethernet port connected to the same network for the board.
The Ethernet and power cables that are included in the kit.
position.
an IP address. The LCD on the board displays the IP address.
the IP address from the LCD into the browser address bar. The Board Update
Portal web page appears in the browser.
to restore the board with its original factory
Arria II GX FPGA Development Kit, 6G Edition User Guide
5. Board Update Portal
“Restoring the Flash Device to