HW-V5-ML506-UNI-G Xilinx Inc, HW-V5-ML506-UNI-G Datasheet - Page 42

• Manufacturer Part Number: HW-V5-ML506-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 SXTr
• Type: DSPr

Specifications of HW-V5-ML506-UNI-G

• Contents: Evaluation Platform, DVI Adapter and CompactFlash Card
• Silicon Manufacturer: Xilinx
• Features: JTAG Programming Interface, Platform Flash, External Clocking
• Kit Contents: Board, Cable, PSU, CD, Docs
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VSX50TFFG1136
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: XC5VSX50TFFG1136
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Chapter 1: ML505/ML506/ML507 Evaluation Platform
42
38. Rotary Encoder
39. Differential GTP/GTX Input and Output with SMA Connectors
The board provides connectivity to a rotary encoder (Panasonic EVQWK4001) with 15
detents, pushbutton, and two phase output signals for direction of rotation interpretation.
One complete revolution of the rotary wheel produces 15 pulses that are output on nets
FPGA_ROTARY_INCA and FPGA_ROTARY_INCB. Pushing the rotary wheel laterally
causes a momentary switch closure on the FPGA_ROTARY_PUSH output. The rotary
encoder circuit is wired so that all switch closures result in an active-High output.
Table 1-23
Table 1-23: Rotary Encoder Connections
Four SMA connectors (Rosenberger 32K153-400E3) provide a convenient and easily
accessible method of interfacing to GTP/GTX transceivers s for general-purpose
connectivity. The SMAs are designed and laid out to provide high-quality GTP/GTX
connections for speeds up to 3.125 Gb/s. Although the ML50x provides access to the
GTP/GTX transceivers, the board is not intended for transceiver characterization.
The transmit pair is connected directly from the FPGA to the SMA connectors while the
receive pair is connected to the FPGA via series AC coupling capacitors. If a DC-coupled
receive-side connection is desired, these capacitors can be replaced with 0Ω 0402-size
resistors.
connectors.
Table 1-24: GTP Pairs through SMA Connectors
FPGA_ROTARY_INCA
FPGA_ROTARY_INCB
FPGA_ROTARY_PUSH
SMA_RX_N
SMA_TX_N
SMA_RX_P
SMA_TX_P
Pin Name
Table 1-24
shows the connections for the rotary encoder.
Name
shows the GTP transceiver pairs available through the SMA
FPGA Pin
K1
K2
L2
www.xilinx.com
J1
FPGA Pin (U1)
AH30
AH29
AG30
Connector
J43
J42
J45
J44
ML505/ML506/ML507 Evaluation Platform
GTP1 of
GTP_X0Y4
receive pair
GTP1 of
GTP_X0Y4
receive pair
ML505/ML506
UG347 (v3.1.1) October 7, 2009
GTX1 of
GTX_X0Y5
receive pair
GTX1 of
GTX_X0Y5
receive pair
ML507
R