HW-V5-ML506-UNI-G Xilinx Inc, HW-V5-ML506-UNI-G Datasheet - Page 57

• Manufacturer Part Number: HW-V5-ML506-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 SXTr
• Type: DSPr

Specifications of HW-V5-ML506-UNI-G

• Contents: Evaluation Platform, DVI Adapter and CompactFlash Card
• Silicon Manufacturer: Xilinx
• Features: JTAG Programming Interface, Platform Flash, External Clocking
• Kit Contents: Board, Cable, PSU, CD, Docs
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VSX50TFFG1136
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: XC5VSX50TFFG1136
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Programming the IDT Clock Chip
Overview
Downloading to the ML50x Board
ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
R
The ML50x evaluation boards feature an Integrated Device Technology (IDT) 3.3V
EEPROM Programmable Clock Generator that is pre-programmed at the factory. In the
event the chip programming is changed, the instructions in this appendix show how to
return the clock chip to its factory default settings using the following equipment:
•
•
1.
2.
3.
4.
5.
6.
Xilinx download cable
JTAG flying wires
Connect a Xilinx download cable to the board using flying leads connected to jumper
J3
Click Start → iMPACT.
Click Boundary Scan.
Right-click Add Xilinx Device…
Locate the SVF file (ML50X_clock_setup.svf in the example shown in
page
Note:
Right-click on the device and select Execute XSVF/SVF.
(Figure
58) and click Open.
The ML50X_clock_setup.svf file is available on the ML50x product page.
B-1).
Figure B-1: J3 IDT5V9885 JTAG Connector
www.xilinx.com
CLK Prog
1
J3
UG347_apdx_a_02_020807
TMS
TDI
TDO
TCK
GND
3.3V
Appendix B
Figure B-2,
57