AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 399

IC MCU 32BIT AVR32 208-LQFP

AT32AP7001-ALUT

Manufacturer Part Number
AT32AP7001-ALUT
Description
IC MCU 32BIT AVR32 208-LQFP
Manufacturer
Atmel
Series
AVR®32 AP7r
Datasheets

Specifications of AT32AP7001-ALUT

Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, POR, PWM, WDT
Number Of I /o
90
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EBI, ISI, MCI, PS2, SPI, TWI, USB
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
90
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 1 Channel
Package
208PQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32AP7001-ALUT
Manufacturer:
EVERLIGHT
Quantity:
12 000
Part Number:
AT32AP7001-ALUT
Manufacturer:
Atmel
Quantity:
10 000
Figure 25-8. NRZ to Manchester Encoding
Figure 25-9. Preamble Patterns, Default Polarity Assumed
32015G–AVR32–09/09
Manchester
Manchester
Manchester
Manchester
encoded
encoded
encoded
encoded
Manchester
data
data
data
data
encoded
encoded
of a user-defined pattern that indicates the beginning of a valid data.
these patterns. If the start frame delimiter, also known as start bit, is one bit, (ONEBIT at 1), a
logic zero is Manchester encoded and indicates that a new character is being sent serially on the
line. If the start frame delimiter is a synchronization pattern also referred to as sync (ONEBIT at
0), a sequence of 3 bit times is sent serially on the line to indicate the start of a new character.
The Manchester encoded character can also be encapsulated by adding both a configurable
preamble and a start frame delimiter pattern. Depending on the configuration, the preamble is a
training sequence, composed of a pre-defined pattern with a programmable length from 1 to 15
bit times. If the preamble length is set to 0, the preamble waveform is not generated prior to any
character. The preamble pattern is chosen among the following sequences: ALL_ONE,
ALL_ZERO, ONE_ZERO or ZERO_ONE, writing the field TX_PP in the MAN register, the field
TX_PL is used to configure the preamble length.
patterns. To improve flexibility, the encoding scheme can be configured using the TX_MPOL
field in the MAN register. If the TX_MPOL field is set to zero (default), a logic zero is encoded
with a zero-to-one transition and a logic one is encoded with a one-to-zero transition. If the
TX_MPOL field is set to one, a logic one is encoded with a one-to-zero transition and a logic
zero is encoded with a zero-to-one transition.
A start frame delimiter is to be configured using the ONEBIT field in the MR register. It consists
NRZ
data
data
Txd
Txd
Txd
Txd
Txd
1
8 bit width "ZERO_ONE" Preamble
8 bit width "ONE_ZERO" Preamble
8 bit width "ALL_ZERO" Preamble
8 bit width "ALL_ONE" Preamble
0
1
1
0
0
Figure 25-9
0
1
SFD
SFD
SFD
SFD
illustrates and defines the valid
AT32AP7001
DATA
DATA
DATA
DATA
Figure 25-10
illustrates
399

Related parts for AT32AP7001-ALUT