AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 693

• Manufacturer Part Number: AT32AP7001-ALUT
• Description: IC MCU 32BIT AVR32 208-LQFP
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7001-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, ISI, MCI, PS2, SPI, TWI, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 1 Channel
• Package: 208PQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

33.7
Table 33-3.
32015G–AVR32–09/09
Offset
0xAC
0x1C
0x2C
0x5C
0x6C
0x9C
0xA0
0xA4
0xA8
0xC0
0xC4
0x00
0x04
0x10
0x14
0x18
0x20
0x24
0x28
0x40
0x44
0x50
0x54
0x58
0x60
0x64
0x68
0x80
0x84
0x90
0x94
0x98
User Interface
TC Register Memory Map
Channel 0 Interrupt Disable Register
Channel 1 Interrupt Disable Register
Channel 2 Interrupt Disable Register
Channel 1 Interrupt Enable Register
Channel 2 Interrupt Enable Register
Channel 0 Interrupt Mask Register
Channel 1 Interrupt Mask Register
Channel 2 Interrupt Mask Register
Channel 0 Control Register
Channel 1 Control Register
Channel 2 Control Register
Channel 0 Status Register
Channel 1 Status Register
Channel 2 Status Register
Channel 0 Mode Register
Channel 1 Mode Register
Channel 2 Mode Register
Channel 0 Counter Value
Channel 1 Counter Value
Channel 2 Counter Value
Interrupt Enable Register
Block Control Register
Channel 0 Register C
Channel 1 Register C
Channel 2 Register C
Channel 0 Register A
Channel 0 Register B
Channel 1 Register A
Channel 1 Register B
Channel 2 Register A
Channel 2 Register B
Block Mode Register
Notes:
Register
1. Read-only if CMRn.WAVE is zero
Register Name
CCR0
CMR0
CCR1
CMR1
CCR2
CMR2
IMR0
IMR1
IMR2
IER0
IDR0
IER1
IDR1
IER2
IDR2
BMR
BCR
CV0
RC0
SR0
CV1
RC1
SR1
CV2
RC2
SR2
RA0
RB0
RA1
RB1
RA2
RB2
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Write-only
Read-only
Read-only
Write-only
Write-only
Read-only
Write-only
Read-only
Read-only
Write-only
Write-only
Read-only
Write-only
Read-only
Read-only
Write-only
Write-only
Read-only
Write-only
Access
(1)
(1)
(1)
(1)
(1)
(1)
AT32AP7001
00x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
693