AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 519

IC MCU 32BIT AVR32 208-LQFP

AT32AP7001-ALUT

Manufacturer Part Number
AT32AP7001-ALUT
Description
IC MCU 32BIT AVR32 208-LQFP
Manufacturer
Atmel
Series
AVR®32 AP7r
Datasheets

Specifications of AT32AP7001-ALUT

Core Processor
AVR
Core Size
32-Bit
Speed
150MHz
Connectivity
EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
Peripherals
AC'97, DMA, I²C, POR, PWM, WDT
Number Of I /o
90
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
D/A 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
EBI, ISI, MCI, PS2, SPI, TWI, USB
Maximum Clock Frequency
150 MHz
Number Of Programmable I/os
90
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Dac
16 bit, 1 Channel
Package
208PQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
150 MHz
Operating Supply Voltage
1.8 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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Manufacturer
Quantity
Price
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Manufacturer:
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Manufacturer:
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28.6.8.2
Figure 28-33. Clock Rate Transition Occurs while the SMC is Performing a Write Operation
32015G–AVR32–09/09
Internal signal from PM
Slow Clock Mode
NBS0, NBS1,
Switching from (to) slow clock mode to (from) normal mode
A0, A1
CLK_SMC
This write cycle finishes with the slow clock mode set
A[25:2]
NWE
NCS
of parameters after the clock rate transition
When switching from slow clock mode to the normal mode, the current slow clock mode transfer
is completed at high clock rate, with the set of slow clock mode parameters. See
on page
Figure 28-34 on page 520
mode to the other.
SLOW CLOCK MODE WRITE SLOW CLOCK MODE WRITE
519. The external device may not be fast enough to support such timings.
1
NWECYCLE = 3
1
illustrates the recommended procedure to properly switch from one
1
1
1
Slow clock mode transition is detected:
1
Reload Configuration Wait State
2
NORMAL MODE WRITE
NWECYCLE = 7
AT32AP7001
3
2
Figure 28-33
519

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