AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 805

• Manufacturer Part Number: AT32AP7001-ALUT
• Description: IC MCU 32BIT AVR32 208-LQFP
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7001-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, ISI, MCI, PS2, SPI, TWI, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 1 Channel
• Package: 208PQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Table 40-16. SMC Read Signals with no Hold Settings
Table 40-17. SMC Write Signals with Hold Settings
Note:
32015G–AVR32–09/09
Symbol
SMC
SMC
SMC
SMC
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
SMC
19
20
21
22
23
24
25
26
29
30
31
32
33
34
35
36
1. hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs wr hold length” or “nwe hold
length"
Parameter
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NCS High
Data Hold after NCS High
Parameter
Data Out Valid before NWE High
Data Out Valid after NWE High
NWE High to NBS0/A0 Change
NWE High to NBS1 Change
NWE High to NBS2/A1 Change
NWE High to NBS3 Change
NWE High to A2 - A25 Change
NWE High to NCS Inactive
NWE Pulse Width
Data Out Valid before NCS High
Data Out Valid after NCS High
NCS High to NWE Inactive
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
NRD Controlled (READ_MODE = 1)
NRD Controlled (READ_MODE = 0)
NRD Controlled (READ_MODE = 1)
NRD Controlled (READ_MODE = 0)
(nwe hold length - ncs wr hold length)* t
(ncs wr hold length - nwe hold length)* t
(ncs wr pulse length - 1)* t
(nwe pulse length - 1) * t
ncs wr hold length * t
nwe hold length * t
nwe hold length * t
nwe hold length * t
nwe hold length * t
nwe hold length * t
nwe hold length * t
nwe pulse length * t
15.8
17.0
Min
Min
0
0
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
CPSMC
- 1.5
- 1.0
- 1.0
- 1.0
- 1.0
- 1.6
- 3.0
- 1.6
- 1.9
CPSMC
CPSMC
AT32AP7001
- 0.3
- 1.5
Units
Units
ns
ns
ns
ns
805